Re: [PATCH 4/4] crypto: ccree: re-introduce ccree eboiv support

kernel test robot
2020-10-26T21:49:00Z

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Hi Gilad,

I love your patch! Perhaps something to improve:

[auto build test WARNING on cryptodev/master]
[also build test WARNING on crypto/master]
[cannot apply to dm/for-next v5.10-rc1 next-20201026]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url: https://github.com/0day-ci/linux/commits/Gilad-Ben-Yossef/crypto-switch-to-crypto-API-for-EBOIV-generation/20201026-210817
base: https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git master
config: x86_64-randconfig-a005-20201026 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project f2c25c70791de95d2466e09b5b58fc37f6ccd7a4)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/0day-ci/linux/commit/cebe27982e51dca8b744adebe5b6f6bcb726e1c8
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Gilad-Ben-Yossef/crypto-switch-to-crypto-API-for-EBOIV-generation/20201026-210817
git checkout cebe27982e51dca8b744adebe5b6f6bcb726e1c8
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/crypto/ccree/cc_cipher.c:658:2: warning: variable 'key_len' is used uninitialized whenever switch default is taken [-Wsometimes-uninitialized]
default:
^~~~~~~
drivers/crypto/ccree/cc_cipher.c:676:37: note: uninitialized use occurs here
set_key_size_aes(&desc[*seq_size], key_len);
^~~~~~~
drivers/crypto/ccree/cc_cipher.c:628:22: note: initialize the variable 'key_len' to silence this warning
unsigned int key_len;
^
= 0
1 warning generated.

vim +/key_len +658 drivers/crypto/ccree/cc_cipher.c

613
614
615 static void cc_setup_xex_state_desc(struct crypto_tfm *tfm,
616 struct cipher_req_ctx *req_ctx,
617 unsigned int ivsize, unsigned int nbytes,
618 struct cc_hw_desc desc[],
619 unsigned int *seq_size)
620 {
621 struct cc_cipher_ctx *ctx_p = crypto_tfm_ctx(tfm);
622 struct device *dev = drvdata_to_dev(ctx_p->drvdata);
623 int cipher_mode = ctx_p->cipher_mode;
624 int flow_mode = ctx_p->flow_mode;
625 int direction = req_ctx->gen_ctx.op_type;
626 dma_addr_t key_dma_addr = ctx_p->user.key_dma_addr;
627 dma_addr_t iv_dma_addr = req_ctx->gen_ctx.iv_dma_addr;
628 unsigned int key_len;
629 unsigned int key_offset;
630
631 switch (cipher_mode) {
632 case DRV_CIPHER_ECB:
633 case DRV_CIPHER_CBC:
634 case DRV_CIPHER_CBC_CTS:
635 case DRV_CIPHER_CTR:
636 case DRV_CIPHER_OFB:
637 /* No secondary key for these ciphers, so just return */
638 return;
639
640 case DRV_CIPHER_XTS:
641 /* Secondary key is same size as primary key and stored after primary key */
642 key_len = ctx_p->keylen / 2;
643 key_offset = key_len;
644 break;
645
646 case DRV_CIPHER_ESSIV:
647 /* Secondary key is a digest of primary key and stored after primary key */
648 key_len = SHA256_DIGEST_SIZE;
649 key_offset = ctx_p->keylen / 2;
650 break;
651
652 case DRV_CIPHER_BITLOCKER:
653 /* Secondary key is same as primary key */
654 key_len = ctx_p->keylen;
655 key_offset = 0;
656 break;
657
> 658 default:
659 dev_err(dev, "Unsupported cipher mode (%d)\n", cipher_mode);
660 }
661
662 /* load XEX key */
663 hw_desc_init(&desc[*seq_size]);
664 set_cipher_mode(&desc[*seq_size], cipher_mode);
665 set_cipher_config0(&desc[*seq_size], direction);
666 if (cc_key_type(tfm) == CC_HW_PROTECTED_KEY) {
667 set_hw_crypto_key(&desc[*seq_size],
668 ctx_p->hw.key2_slot);
669 } else {
670 set_din_type(&desc[*seq_size], DMA_DLLI,
671 (key_dma_addr + key_offset),
672 key_len, NS_BIT);
673 }
674 set_xex_data_unit_size(&desc[*seq_size], nbytes);
675 set_flow_mode(&desc[*seq_size], S_DIN_to_AES2);
676 set_key_size_aes(&desc[*seq_size], key_len);
677 set_setup_mode(&desc[*seq_size], SETUP_LOAD_XEX_KEY);
678 (*seq_size)++;
679
680 /* Load IV */
681 hw_desc_init(&desc[*seq_size]);
682 set_setup_mode(&desc[*seq_size], SETUP_LOAD_STATE1);
683 set_cipher_mode(&desc[*seq_size], cipher_mode);
684 set_cipher_config0(&desc[*seq_size], direction);
685 set_key_size_aes(&desc[*seq_size], key_len);
686 set_flow_mode(&desc[*seq_size], flow_mode);
687 set_din_type(&desc[*seq_size], DMA_DLLI, iv_dma_addr, CC_AES_BLOCK_SIZE, NS_BIT);
688 (*seq_size)++;
689 }
690

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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