From: sashiko-bot@kernel.org
To: "Bartosz Golaszewski" <bartosz.golaszewski@oss.qualcomm.com>,
"Thara Gopinath" <thara.gopinath@gmail.com>,
"Herbert Xu" <herbert@gondor.apana.org.au>,
"David S. Miller" <davem@davemloft.net>,
"Stanimir Varbanov" <svarbanov@mm-sol.com>,
"Eneas U de Queiroz" <cotequeiroz@gmail.com>,
"Kuldeep Singh" <kuldeep.singh@oss.qualcomm.com>,
"Eric Biggers" <ebiggers@kernel.org>,
"Demi Marie Obenour" <demiobenour@gmail.com>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konradybcio@kernel.org>,
"Russell King" <linux@armlinux.org.uk>,
"Abel Vesa" <abelvesa@kernel.org>
Cc: linux-crypto@vger.kernel.org, brgl@kernel.org,
"Pankaj Patil" <pankaj.patil@oss.qualcomm.com>,
"Abel Vesa" <abel.vesa@oss.qualcomm.com>
Subject: Re: [PATCH v11 2/4] soc: qcom: add core driver for the Qualcomm Crypto Engine
Date: Thu, 12 Nov 2026 14:21:28 +0000 [thread overview]
Message-ID: <sashiko-outbox-211301@kernel.org> (raw)
In-Reply-To: <20261112-qce-fix-self-tests-v11-2-b86a65ee7107@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] soc: qcom: qce-core: wrong error check in qce_core_probe()
--
commit 3e3675a3a324f53defb90d980deda844f4366b5a
Author: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
soc: qcom: add core driver for the Qualcomm Crypto Engine
This commit adds the core platform driver for the Qualcomm Crypto Engine to
manage runtime PM interconnect scaling and register child auxiliary devices.
> diff --git a/drivers/soc/qcom/qce-core.c b/drivers/soc/qcom/qce-core.c
> new file mode 100644
> index 0000000000000..d51a791bb1a36
> --- /dev/null
> +++ b/drivers/soc/qcom/qce-core.c
> @@ -0,0 +1,92 @@
[ ... ]
> +static int qce_core_probe(struct platform_device *pdev)
> +{
> + struct auxiliary_device *auxdev;
> + struct device *dev = &pdev->dev;
> + struct icc_path *mem_path;
> + const char *const *subdev;
> + int ret;
> +
> + mem_path = devm_of_icc_get(&pdev->dev, "memory");
> + if (IS_ERR(mem_path))
> + return PTR_ERR(mem_path);
> +
> + dev_set_drvdata(dev, mem_path);
> +
> + ret = devm_pm_runtime_enable(dev);
> + if (ret)
> + return ret;
> +
> + PM_RUNTIME_ACQUIRE(dev, pm);
> + ret = PM_RUNTIME_ACQUIRE_ERR(&pm);
> + if (ret)
> + return ret;
> +
> + for (subdev = qce_core_aux_devs; *subdev; subdev++) {
> + auxdev = __devm_auxiliary_device_create(dev, "qce", *subdev, NULL, 0);
> + if (IS_ERR(auxdev))
> + return PTR_ERR(auxdev);
> + }
[Severity: Medium]
Should this check for !auxdev instead of IS_ERR(auxdev)?
__devm_auxiliary_device_create() returns NULL on failure, so a failed
allocation or registration will be ignored and qce_core_probe() will return
0 without creating the child device.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261112-qce-fix-self-tests-v11-0-b86a65ee7107@oss.qualcomm.com?part=2
next prev parent reply other threads:[~2026-11-12 14:21 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-12 14:10 [PATCH v11 0/4] crypto: qce - Split the crypto driver into core and crypto parts Bartosz Golaszewski
2026-11-12 14:10 ` [PATCH v11 1/4] crypto: qce - convert to auxiliary bus Bartosz Golaszewski
2026-11-12 14:34 ` sashiko-bot
2026-11-12 14:10 ` [PATCH v11 2/4] soc: qcom: add core driver for the Qualcomm Crypto Engine Bartosz Golaszewski
2026-11-12 14:21 ` sashiko-bot [this message]
2026-11-12 14:10 ` [PATCH v11 3/4] arm64: defconfig: update the Qualcomm Crypto Engine entry Bartosz Golaszewski
2026-11-12 14:10 ` [PATCH v11 4/4] arm: multi_v7_defconfig: " Bartosz Golaszewski
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