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From: guoren@kernel.org
To: guoren@kernel.org
Cc: linux-kernel@vger.kernel.org, linux-csky@vger.kernel.org,
	Guo Ren <guoren@linux.alibaba.com>,
	Al Viro <viro@zeniv.linux.org.uk>,
	stable@vger.kernel.org
Subject: [PATCH V2 2/2] csky: Fixup regs.sr broken in ptrace
Date: Sat, 25 Sep 2021 13:16:47 +0800	[thread overview]
Message-ID: <20210925051647.1162829-2-guoren@kernel.org> (raw)
In-Reply-To: <20210925051647.1162829-1-guoren@kernel.org>

From: Guo Ren <guoren@linux.alibaba.com>

gpr_get() return the entire pt_regs (include sr) to userspace, if we
don't restore the C bit in gpr_set, it may break the ALU result in
that context. So the C flag bit is part of gpr context, that's why
riscv totally remove the C bit in the ISA. That makes sr reg clear
from userspace to supervisor privilege.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: stable@vger.kernel.org
---
 arch/csky/kernel/ptrace.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/csky/kernel/ptrace.c b/arch/csky/kernel/ptrace.c
index 0105ac81b432..1a5f54e0d272 100644
--- a/arch/csky/kernel/ptrace.c
+++ b/arch/csky/kernel/ptrace.c
@@ -99,7 +99,8 @@ static int gpr_set(struct task_struct *target,
 	if (ret)
 		return ret;
 
-	regs.sr = task_pt_regs(target)->sr;
+	/* BIT(0) of regs.sr is Condition Code/Carry bit */
+	regs.sr = (regs.sr & BIT(0)) | (task_pt_regs(target)->sr & ~BIT(0));
 #ifdef CONFIG_CPU_HAS_HILO
 	regs.dcsr = task_pt_regs(target)->dcsr;
 #endif
-- 
2.25.1


      reply	other threads:[~2021-09-25  5:17 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-25  5:16 [PATCH V2 1/2] csky: don't let sigreturn play with priveleged bits of status register guoren
2021-09-25  5:16 ` guoren [this message]

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