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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id z13-20020a1709067e4d00b009829dc0f2a0sm2330135ejr.111.2023.09.15.05.22.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Sep 2023 05:22:22 -0700 (PDT) Date: Fri, 15 Sep 2023 14:22:21 +0200 From: Andrew Jones To: Conor Dooley Cc: Leonardo Bras , guoren@kernel.org, paul.walmsley@sifive.com, anup@brainfault.org, peterz@infradead.org, mingo@redhat.com, will@kernel.org, palmer@rivosinc.com, longman@redhat.com, boqun.feng@gmail.com, tglx@linutronix.de, paulmck@kernel.org, rostedt@goodmis.org, rdunlap@infradead.org, catalin.marinas@arm.com, xiaoguang.xing@sophgo.com, bjorn@rivosinc.com, alexghiti@rivosinc.com, keescook@chromium.org, greentime.hu@sifive.com, jszhang@kernel.org, wefu@redhat.com, wuwei2016@iscas.ac.cn, linux-arch@vger.kernel.org, linux-riscv@lists.infradead.org, linux-doc@vger.kernel.org, kvm@vger.kernel.org, virtualization@lists.linux-foundation.org, linux-csky@vger.kernel.org, Guo Ren Subject: Re: [PATCH V11 03/17] riscv: Use Zicbop in arch_xchg when available Message-ID: <20230915-1c2b122672642e2cbcbaaaef@orel> References: <20230910082911.3378782-1-guoren@kernel.org> <20230910082911.3378782-4-guoren@kernel.org> <20230914-1ce4f391a14e56b456d88188@orel> <20230915-85238ac7734cf543bff3ddad@orel> <20230915-take-virus-1245c5dfed0a@wendy> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230915-take-virus-1245c5dfed0a@wendy> Precedence: bulk List-ID: X-Mailing-List: linux-csky@vger.kernel.org On Fri, Sep 15, 2023 at 12:26:20PM +0100, Conor Dooley wrote: > On Fri, Sep 15, 2023 at 01:07:40PM +0200, Andrew Jones wrote: > > On Fri, Sep 15, 2023 at 05:22:26AM -0300, Leonardo Bras wrote: > > > On Thu, Sep 14, 2023 at 03:47:59PM +0200, Andrew Jones wrote: > > > > On Sun, Sep 10, 2023 at 04:28:57AM -0400, guoren@kernel.org wrote: > > > > > From: Guo Ren > > ... > > > > > diff --git a/arch/riscv/include/asm/insn-def.h b/arch/riscv/include/asm/insn-def.h > > > > > index 6960beb75f32..dc590d331894 100644 > > > > > --- a/arch/riscv/include/asm/insn-def.h > > > > > +++ b/arch/riscv/include/asm/insn-def.h > > > > > @@ -134,6 +134,7 @@ > > > > > > > > > > #define RV_OPCODE_MISC_MEM RV_OPCODE(15) > > > > > #define RV_OPCODE_SYSTEM RV_OPCODE(115) > > > > > +#define RV_OPCODE_PREFETCH RV_OPCODE(19) > > > > > > > > This should be named RV_OPCODE_OP_IMM and be placed in > > > > numerical order with the others, i.e. above SYSTEM. > > > > > > > > > > > > > > #define HFENCE_VVMA(vaddr, asid) \ > > > > > INSN_R(OPCODE_SYSTEM, FUNC3(0), FUNC7(17), \ > > > > > @@ -196,4 +197,8 @@ > > > > > INSN_I(OPCODE_MISC_MEM, FUNC3(2), __RD(0), \ > > > > > RS1(base), SIMM12(4)) > > > > > > > > > > +#define CBO_prefetchw(base) \ > > > > > > > > Please name this 'PREFETCH_w' and it should take an immediate parameter, > > > > even if we intend to pass 0 for it. > > > > > > It makes sense. > > > > > > The mnemonic in the previously mentioned documentation is: > > > > > > prefetch.w offset(base) > > > > > > So yeah, makes sense to have both offset and base as parameters for > > > CBO_prefetchw (or PREFETCH_w, I have no strong preference). > > > > I have a strong preference :-) > > > > PREFETCH_w is consistent with the naming we already have for e.g. > > cbo.clean, which is CBO_clean. The instruction we're picking a name > > for now is prefetch.w, not cbo.prefetchw. > > btw, the CBO_foo stuff was named that way as we were using them in > alternatives originally as an argument, that manifested as: > "cbo." __stringify(_op) " (a0)\n\t" > That was later changed to > CBO_##_op(a0) > but the then un-needed (AFAICT) capitalisation was kept to avoid > touching the callsites of the alternative. Maybe you remember better > than I do drew, since the idea was yours & I forgot I even wrote that > pattch. And I forgot anything I may have suggested about it :-) > If this isn't being used in a similar manner, then the w has no reason > to be in the odd lowercase form. Other than to be consistent... However, the CBO_* instructions are not consistent with the rest of macros. If we don't need lowercase for any reason, then my preference would be to bite the bullet and change all the callsites of CBO_* macros and then introduce this new instruction as PREFETCH_W Thanks, drew