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From:   "Dai WeiBin \(David Dai\)" <david.dai@montage-tech.com>
To:     "'Ben Widawsky'" <ben.widawsky@intel.com>
Cc:     <linux-cxl@vger.kernel.org>,
        "'Linux ACPI'" <linux-acpi@vger.kernel.org>,
        "'Dan Williams'" <dan.j.williams@intel.com>
Subject: CXL HDM alignment
Date:   Fri, 7 May 2021 09:43:47 +0800
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Hi Ben,

I am sorry to disturb you for consulting you a question, my question is =
how I can make CXL HDM 1G-size alignment, CXL specification defines HDM =
is 256M alignment.
>From my understanding, BIOS will allocate HPA and build ACPI SRAT for =
CXL HDM, do we have any method to tell OS or BIOS to align HDM with 1G =
size?

I don't sure whether we can configure BIOS address allocation, but hope =
any your suggestion and help!

Thanks,
David