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Thu, 14 Mar 2024 23:23:34 +0800 (CST) Message-ID: <125c1701-3f18-45f7-9770-45ec41feae7b@fujitsu.com> Date: Thu, 14 Mar 2024 23:23:33 +0800 Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 3/5] cxl/core: introduce cxl_mem_report_poison() To: Dan Williams Cc: Jonathan.Cameron@huawei.com, qemu-devel@nongnu.org, linux-cxl@vger.kernel.org References: <20240209115417.724638-1-ruansy.fnst@fujitsu.com> <20240209115417.724638-6-ruansy.fnst@fujitsu.com> <65c71bdc81927_d2d4294f9@dwillia2-xfh.jf.intel.com.notmuch> From: Shiyang Ruan In-Reply-To: <65c71bdc81927_d2d4294f9@dwillia2-xfh.jf.intel.com.notmuch> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-TM-AS-Product-Ver: IMSS-9.1.0.1417-9.0.0.1002-28252.000 X-TM-AS-User-Approved-Sender: Yes X-TMASE-Version: IMSS-9.1.0.1417-9.0.1002-28252.000 X-TMASE-Result: 10--16.183800-10.000000 X-TMASE-MatchedRID: 6Yvl3or3fgqPvrMjLFD6eCkMR2LAnMRp2q80vLACqaeqvcIF1TcLYA4p qmczoDwtjlYl41I8jVOZKLS7xMLJgrKFg5Tail4EWFHKJ2wSViT865QlVwxmG7rfxlRjqBJ34MP 8QbjSbz3qhalTWVmQtzioQ72L2lCJjnkOkV5xgha5x7uAXGEprcE5XPQnBzGXq8KsbROd9VTZ3y a1EhGxQ5J5q9EvnZr1z2BzWfwZiWsMeUy96gk4BMQ4mpKyfkqZdmWMDQajOiKwcSh5kytY+bTLc NrcH2Gr585VzGMOFzABi3kqJOK62b+/RSFMoL2cxEHRux+uk8h+ICquNi0WJNQlmYqwTTb1fLTm 1duEMC3e/XLnHnOr96YgO4sEv0aRftwZ3X11IV0= X-TMASE-SNAP-Result: 1.821001.0001-0-1-22:0,33:0,34:0-0 在 2024/2/10 14:46, Dan Williams 写道: > Shiyang Ruan wrote: >> If poison is detected(reported from cxl memdev), OS should be notified to >> handle it. Introduce this function: >> 1. translate DPA to HPA; >> 2. construct a MCE instance; (TODO: more details need to be filled) >> 3. log it into MCE event queue; >> >> After that, MCE mechanism can walk over its notifier chain to execute >> specific handlers. >> >> Signed-off-by: Shiyang Ruan >> --- >> arch/x86/kernel/cpu/mce/core.c | 1 + >> drivers/cxl/core/mbox.c | 33 +++++++++++++++++++++++++++++++++ >> 2 files changed, 34 insertions(+) >> >> diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c >> index bc39252bc54f..a64c0aceb7e0 100644 >> --- a/arch/x86/kernel/cpu/mce/core.c >> +++ b/arch/x86/kernel/cpu/mce/core.c >> @@ -131,6 +131,7 @@ void mce_setup(struct mce *m) >> m->ppin = cpu_data(m->extcpu).ppin; >> m->microcode = boot_cpu_data.microcode; >> } >> +EXPORT_SYMBOL_GPL(mce_setup); > > No, mce_setup() is x86 specific and the CXL subsystem is CPU > architecture independent. My expectation is that CXL should translate > errors for edac similar to how the ACPI GHES code does it. See usage of > edac_raw_mc_handle_error() and memory_failure_queue(). > > Otherwise an MCE is a CPU consumption of poison event, and CXL is > reporting device-side discovery of poison. Yes, I misunderstood here. I was mean to use MCE to finally call memory_failure(). I think memory_failure_queue() is what I need. void memory_failure_queue(unsigned long pfn, int flags) But it can only queue one PFN at a time, we may need to make it support queuing a range of PFN. -- Thanks, Ruan.