From: "Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>
To: Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Dave Jiang <dave.jiang@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Robert Richter <rrichter@amd.com>
Cc: linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
Gregory Price <gourry@gourry.net>,
Terry Bowman <terry.bowman@amd.com>,
Robert Richter <rrichter@amd.com>
Subject: Re: [PATCH v4 04/14] cxl: Introduce parent_port_of() helper
Date: Mon, 21 Apr 2025 19:49:28 +0200 [thread overview]
Message-ID: <17999655.87JKscXggJ@fdefranc-mobl3> (raw)
In-Reply-To: <20250306164448.3354845-5-rrichter@amd.com>
On Thursday, March 6, 2025 5:44:38 PM Central European Summer Time Robert Richter wrote:
> Often a parent port must be determined. Introduce the parent_port_of()
> helper function for this.
>
> Signed-off-by: Robert Richter <rrichter@amd.com>
> Reviewed-by: Gregory Price <gourry@gourry.net>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> Tested-by: Gregory Price <gourry@gourry.net>
> ---
>
I think that "often" doesn't provide any relevant information.
I would rephrase the commit message with something like that:
"Introduce the parent_port_of() helper function to avoid open
coding of determination of a parent port.".
Other than that:
Reviewed-by: Fabio M. De Francesco <fabio.m.de.francesco@linux.intel.com>
>
> drivers/cxl/core/port.c | 15 +++++++++------
> drivers/cxl/core/region.c | 11 ++---------
> drivers/cxl/cxl.h | 1 +
> 3 files changed, 12 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
> index 6a44b6dad3c7..25eecb591496 100644
> --- a/drivers/cxl/core/port.c
> +++ b/drivers/cxl/core/port.c
> @@ -602,17 +602,20 @@ struct cxl_port *to_cxl_port(const struct device *dev)
> }
> EXPORT_SYMBOL_NS_GPL(to_cxl_port, "CXL");
>
> +struct cxl_port *parent_port_of(struct cxl_port *port)
> +{
> + if (!port || !port->parent_dport)
> + return NULL;
> + return port->parent_dport->port;
> +}
> +EXPORT_SYMBOL_NS_GPL(parent_port_of, "CXL");
> +
> static void unregister_port(void *_port)
> {
> struct cxl_port *port = _port;
> - struct cxl_port *parent;
> + struct cxl_port *parent = parent_port_of(port);
> struct device *lock_dev;
>
> - if (is_cxl_root(port))
> - parent = NULL;
> - else
> - parent = to_cxl_port(port->dev.parent);
> -
> /*
> * CXL root port's and the first level of ports are unregistered
> * under the platform firmware device lock, all other ports are
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index cbe762abf6b3..4f79cc17c9c8 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -1748,13 +1748,6 @@ static int cmp_interleave_pos(const void *a, const void *b)
> return cxled_a->pos - cxled_b->pos;
> }
>
> -static struct cxl_port *next_port(struct cxl_port *port)
> -{
> - if (!port->parent_dport)
> - return NULL;
> - return port->parent_dport->port;
> -}
> -
> static int match_switch_decoder_by_range(struct device *dev,
> const void *data)
> {
> @@ -1781,7 +1774,7 @@ static int find_pos_and_ways(struct cxl_port *port, struct range *range,
> struct device *dev;
> int rc = -ENXIO;
>
> - parent = next_port(port);
> + parent = parent_port_of(port);
> if (!parent)
> return rc;
>
> @@ -1861,7 +1854,7 @@ static int cxl_calc_interleave_pos(struct cxl_endpoint_decoder *cxled)
> */
>
> /* Iterate from endpoint to root_port refining the position */
> - for (iter = port; iter; iter = next_port(iter)) {
> + for (iter = port; iter; iter = parent_port_of(iter)) {
> if (is_cxl_root(iter))
> break;
>
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index be8a7dc77719..24cec16d02a6 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -724,6 +724,7 @@ static inline bool is_cxl_root(struct cxl_port *port)
> int cxl_num_decoders_committed(struct cxl_port *port);
> bool is_cxl_port(const struct device *dev);
> struct cxl_port *to_cxl_port(const struct device *dev);
> +struct cxl_port *parent_port_of(struct cxl_port *port);
> void cxl_port_commit_reap(struct cxl_decoder *cxld);
> struct pci_bus;
> int devm_cxl_register_pci_bus(struct device *host, struct device *uport_dev,
>
next prev parent reply other threads:[~2025-04-21 17:49 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-06 16:44 [PATCH v4 00/14] cxl: Address translation support, part 1: Cleanups and refactoring Robert Richter
2025-03-06 16:44 ` [PATCH v4 01/14] cxl: Remove else after return Robert Richter
2025-03-14 11:27 ` Jonathan Cameron
2025-04-15 21:27 ` Alison Schofield
2025-04-18 16:23 ` Fabio M. De Francesco
2025-03-06 16:44 ` [PATCH v4 02/14] cxl/pci: Moving code in cxl_hdm_decode_init() Robert Richter
2025-03-14 11:31 ` Jonathan Cameron
2025-04-15 21:29 ` Alison Schofield
2025-04-18 16:28 ` Fabio M. De Francesco
2025-03-06 16:44 ` [PATCH v4 03/14] cxl/pci: Add comments to cxl_hdm_decode_init() Robert Richter
2025-03-14 11:33 ` Jonathan Cameron
2025-04-17 13:11 ` Robert Richter
2025-04-15 21:30 ` Alison Schofield
2025-04-17 13:48 ` Gregory Price
2025-04-18 16:34 ` Fabio M. De Francesco
2025-03-06 16:44 ` [PATCH v4 04/14] cxl: Introduce parent_port_of() helper Robert Richter
2025-03-06 18:57 ` Dan Williams
2025-04-15 21:30 ` Alison Schofield
2025-04-21 17:49 ` Fabio M. De Francesco [this message]
2025-03-06 16:44 ` [PATCH v4 05/14] cxl/region: Rename function to cxl_find_decoder_early() Robert Richter
2025-03-06 19:51 ` Dan Williams
2025-03-06 16:44 ` [PATCH v4 06/14] cxl/region: Avoid duplicate call of cxl_find_decoder_early() Robert Richter
2025-03-06 20:01 ` Dan Williams
2025-03-06 16:44 ` [PATCH v4 07/14] cxl/region: Move find_cxl_root() to cxl_add_to_region() Robert Richter
2025-03-06 20:14 ` Dan Williams
2025-04-15 21:32 ` Alison Schofield
2025-04-21 21:21 ` Fabio M. De Francesco
2025-03-06 16:44 ` [PATCH v4 08/14] cxl/region: Factor out code to find the root decoder Robert Richter
2025-03-06 20:35 ` Dan Williams
2025-04-15 21:32 ` Alison Schofield
2025-04-22 16:09 ` Fabio M. De Francesco
2025-03-06 16:44 ` [PATCH v4 09/14] cxl/region: Factor out code to find a root decoder's region Robert Richter
2025-03-06 20:37 ` Dan Williams
2025-04-15 21:33 ` Alison Schofield
2025-04-23 15:32 ` Fabio M. De Francesco
2025-03-06 16:44 ` [PATCH v4 10/14] cxl/region: Add function to find a port's switch decoder by range Robert Richter
2025-03-06 20:55 ` Dan Williams
2025-03-06 16:44 ` [PATCH v4 11/14] cxl/region: Add a dev_warn() on registration failure Robert Richter
2025-03-06 20:57 ` Dan Williams
2025-04-15 21:34 ` Alison Schofield
2025-04-23 20:49 ` Fabio M. De Francesco
2025-03-06 16:44 ` [PATCH v4 12/14] cxl/region: Add a dev_err() on missing target list entries Robert Richter
2025-03-06 20:58 ` Dan Williams
2025-04-15 21:35 ` Alison Schofield
2025-04-23 20:50 ` Fabio M. De Francesco
2025-03-06 16:44 ` [PATCH v4 13/14] cxl: Add a dev_dbg() when a decoder was added to a port Robert Richter
2025-03-06 21:06 ` Dan Williams
2025-04-29 13:43 ` Robert Richter
2025-04-15 21:36 ` Alison Schofield
2025-03-06 16:44 ` [PATCH v4 14/14] cxl/acpi: Unify CFMWS memory log messages with SRAT messages Robert Richter
2025-03-06 21:12 ` Dan Williams
2025-04-15 23:23 ` [PATCH v4 00/14] cxl: Address translation support, part 1: Cleanups and refactoring Alison Schofield
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