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Thu, 26 Jun 2025 09:48:49 +0000 (GMT) Date: Thu, 26 Jun 2025 15:18:40 +0530 From: Neeraj Kumar To: Jonathan Cameron Cc: dan.j.williams@intel.com, dave@stgolabs.net, dave.jiang@intel.com, alison.schofield@intel.com, vishal.l.verma@intel.com, ira.weiny@intel.com, a.manzanares@samsung.com, nifan.cxl@gmail.com, anisa.su@samsung.com, vishak.g@samsung.com, krish.reddy@samsung.com, arun.george@samsung.com, alok.rathore@samsung.com, neeraj.kernel@gmail.com, linux-kernel@vger.kernel.org, linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, gost.dev@samsung.com, cpgs@samsung.com Subject: Re: [RFC PATCH 01/20] nvdimm/label: Introduce NDD_CXL_LABEL flag to set cxl label format Message-ID: <1983025922.01750943702980.JavaMail.epsvc@epcpadp1new> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In-Reply-To: <20250620174001.00003aa2@huawei.com> X-CMS-MailID: 20250626094852epcas5p3dc4fb79d144ce6259c3ed731bedf661c X-Msg-Generator: CA Content-Type: multipart/mixed; boundary="----K5ZVV-zrPS8y8iJelFUsagW7KEVVNg7wn3oh2ZJRPRpX678s=_cd417_" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P X-CPGSPASS: Y X-Hop-Count: 3 X-CMS-RootMailID: 20250617124008epcas5p2e702f786645d44ceb1cdd980a914ce8e References: <20250617123944.78345-1-s.neeraj@samsung.com> <158453976.61750165203630.JavaMail.epsvc@epcpadp1new> <20250620174001.00003aa2@huawei.com> ------K5ZVV-zrPS8y8iJelFUsagW7KEVVNg7wn3oh2ZJRPRpX678s=_cd417_ Content-Type: text/plain; charset="utf-8"; format="flowed" Content-Disposition: inline On 20/06/25 05:40PM, Jonathan Cameron wrote: >On Tue, 17 Jun 2025 18:09:25 +0530 >Neeraj Kumar wrote: > >> NDD_CXL_LABEL is introduced to set cxl LSA 2.1 label format >> Accordingly updated label index version >> >> Signed-off-by: Neeraj Kumar >A few local comments. I'll need to read on to figure out how this >fits in generally. > >> --- >> drivers/nvdimm/dimm.c | 1 + >> drivers/nvdimm/dimm_devs.c | 10 ++++++++++ >> drivers/nvdimm/label.c | 16 ++++++++++++---- >> drivers/nvdimm/nd.h | 1 + >> include/linux/libnvdimm.h | 3 +++ >> 5 files changed, 27 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/nvdimm/dimm.c b/drivers/nvdimm/dimm.c >> index 91d9163ee303..8753b5cd91cc 100644 >> --- a/drivers/nvdimm/dimm.c >> +++ b/drivers/nvdimm/dimm.c >> @@ -62,6 +62,7 @@ static int nvdimm_probe(struct device *dev) >> if (rc < 0) >> dev_dbg(dev, "failed to unlock dimm: %d\n", rc); >> >> + ndd->cxl = nvdimm_check_cxl_label_format(ndd->dev); >> >> /* >> * EACCES failures reading the namespace label-area-properties >> diff --git a/drivers/nvdimm/dimm_devs.c b/drivers/nvdimm/dimm_devs.c >> index 21498d461fde..e8f545f889fd 100644 >> --- a/drivers/nvdimm/dimm_devs.c >> +++ b/drivers/nvdimm/dimm_devs.c >> @@ -18,6 +18,16 @@ >> >> static DEFINE_IDA(dimm_ida); >> >> +bool nvdimm_check_cxl_label_format(struct device *dev) >> +{ >> + struct nvdimm *nvdimm = to_nvdimm(dev); >> + >> + if (test_bit(NDD_CXL_LABEL, &nvdimm->flags)) >> + return true; >> + >> + return false; > > return test_bit(NDD_CXL_LABEL, &nvdimm->flags); > >Unless this is going to get more complex in later patches, in which case >may be fine to ignore this comment. > Okay. I will fix in V1 patch. >> +} >> + >> /* >> * Retrieve bus and dimm handle and return if this bus supports >> * get_config_data commands >> diff --git a/drivers/nvdimm/label.c b/drivers/nvdimm/label.c >> index 082253a3a956..48b5ba90216d 100644 >> --- a/drivers/nvdimm/label.c >> +++ b/drivers/nvdimm/label.c >> @@ -687,11 +687,19 @@ static int nd_label_write_index(struct nvdimm_drvdata *ndd, int index, u32 seq, >> - (unsigned long) to_namespace_index(ndd, 0); >> nsindex->labeloff = __cpu_to_le64(offset); >> nsindex->nslot = __cpu_to_le32(nslot); >> - nsindex->major = __cpu_to_le16(1); >> - if (sizeof_namespace_label(ndd) < 256) >> + >> + /* Support CXL LSA 2.1 label format */ > >Might be good to sprinkle some extra details in the references. >E.g. CXL r3.2 Table 9-9 Label Index Block Layout > Sure, I will update it in V1 >> + if (ndd->cxl) { >> + nsindex->major = __cpu_to_le16(2); >> nsindex->minor = __cpu_to_le16(1); >> - else >> - nsindex->minor = __cpu_to_le16(2); >> + } else { >> + nsindex->major = __cpu_to_le16(1); > >Same for these. Case of making reviewers jobs easier by >giving them breadcrumb trails to follow. > Sure, I will update it in V1 >> + if (sizeof_namespace_label(ndd) < 256) >> + nsindex->minor = __cpu_to_le16(1); >> + else >> + nsindex->minor = __cpu_to_le16(2); >> + } >> + >> nsindex->checksum = __cpu_to_le64(0); >> if (flags & ND_NSINDEX_INIT) { >> unsigned long *free = (unsigned long *) nsindex->free; >> diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h >> index 5ca06e9a2d29..304f0e9904f1 100644 >> --- a/drivers/nvdimm/nd.h >> +++ b/drivers/nvdimm/nd.h >> @@ -522,6 +522,7 @@ void nvdimm_set_labeling(struct device *dev); >> void nvdimm_set_locked(struct device *dev); >> void nvdimm_clear_locked(struct device *dev); >> int nvdimm_security_setup_events(struct device *dev); >> +bool nvdimm_check_cxl_label_format(struct device *dev); >> #if IS_ENABLED(CONFIG_NVDIMM_KEYS) >> int nvdimm_security_unlock(struct device *dev); >> #else >> diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h >> index e772aae71843..0a55900842c8 100644 >> --- a/include/linux/libnvdimm.h >> +++ b/include/linux/libnvdimm.h >> @@ -44,6 +44,9 @@ enum { >> /* dimm provider wants synchronous registration by __nvdimm_create() */ >> NDD_REGISTER_SYNC = 8, >> >> + /* dimm supports region labels (LSA Format 2.1) */ >> + NDD_CXL_LABEL = 9, >> + >> /* need to set a limit somewhere, but yes, this is likely overkill */ >> ND_IOCTL_MAX_BUFLEN = SZ_4M, >> ND_CMD_MAX_ELEM = 5, > ------K5ZVV-zrPS8y8iJelFUsagW7KEVVNg7wn3oh2ZJRPRpX678s=_cd417_ Content-Type: text/plain; charset="utf-8" ------K5ZVV-zrPS8y8iJelFUsagW7KEVVNg7wn3oh2ZJRPRpX678s=_cd417_--