From: ira.weiny@intel.com
To: Ben Widawsky <ben.widawsky@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Ira Weiny <ira.weiny@intel.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH V3 4/5] cxl/mem: Reserve individual register block regions
Date: Thu, 27 May 2021 17:49:21 -0700 [thread overview]
Message-ID: <20210528004922.3980613-5-ira.weiny@intel.com> (raw)
In-Reply-To: <20210528004922.3980613-1-ira.weiny@intel.com>
From: Ira Weiny <ira.weiny@intel.com>
Some hardware implementations mix component and device registers into
the same BAR and the driver stack is going to need independent mapping
implementations for those 2 cases. Furthermore, it will be nice to have
finer grained mappings should user space want to map some register
blocks.
Now that individual register blocks are mapped; those blocks regions
should be reserved individually to fully separate the register blocks.
Release the 'global' memory reservation and create individual register
block region reservations through devm.
NOTE: pci_release_mem_regions() is still compatible with
pcim_enable_device() because it removes the automatic region release
when called. So preserve the pcim_enable_device() so that the pcim
interface can be called if needed.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
---
Changes for V3
Dan
Add pcim_enable_device() back in because it is needed
and is not incompatible with pci_release_mem_regions()
like I originally though.
Change cxl_ioremap_block() to devm_cxl_iomap_block()
Jonathan
Update commit message with more details.
---
drivers/cxl/core.c | 36 ++++++++++++++++++++++++++++++++----
drivers/cxl/pci.c | 2 ++
2 files changed, 34 insertions(+), 4 deletions(-)
diff --git a/drivers/cxl/core.c b/drivers/cxl/core.c
index ab8d6bce59c2..2b5aac6f76f2 100644
--- a/drivers/cxl/core.c
+++ b/drivers/cxl/core.c
@@ -82,11 +82,33 @@ void cxl_probe_device_regs(struct device *dev, void __iomem *base,
}
EXPORT_SYMBOL_GPL(cxl_probe_device_regs);
+static void __iomem *devm_cxl_iomap_block(struct pci_dev *pdev,
+ resource_size_t addr,
+ resource_size_t length)
+{
+ struct device *dev = &pdev->dev;
+ void __iomem *ret_val;
+ struct resource *res;
+
+ res = devm_request_mem_region(dev, addr, length, pci_name(pdev));
+ if (!res) {
+ dev_err(dev, "Failed to request region %#llx-%#llx\n",
+ addr, addr+length);
+ return NULL;
+ }
+
+ ret_val = devm_ioremap(dev, addr, length);
+ if (!ret_val)
+ dev_err(dev, "Failed to map region %#llx-%#llx\n",
+ addr, addr+length);
+
+ return ret_val;
+}
+
int cxl_map_device_regs(struct pci_dev *pdev,
struct cxl_device_regs *regs,
struct cxl_register_map *map)
{
- struct device *dev = &pdev->dev;
resource_size_t phys_addr;
phys_addr = pci_resource_start(pdev, map->barno);
@@ -98,7 +120,9 @@ int cxl_map_device_regs(struct pci_dev *pdev,
addr = phys_addr + map->device_map.status.offset;
length = map->device_map.status.size;
- regs->status = devm_ioremap(dev, addr, length);
+ regs->status = devm_cxl_iomap_block(pdev, addr, length);
+ if (!regs->status)
+ return -ENOMEM;
}
if (map->device_map.mbox.valid) {
@@ -107,7 +131,9 @@ int cxl_map_device_regs(struct pci_dev *pdev,
addr = phys_addr + map->device_map.mbox.offset;
length = map->device_map.mbox.size;
- regs->mbox = devm_ioremap(dev, addr, length);
+ regs->mbox = devm_cxl_iomap_block(pdev, addr, length);
+ if (!regs->mbox)
+ return -ENOMEM;
}
if (map->device_map.memdev.valid) {
@@ -116,7 +142,9 @@ int cxl_map_device_regs(struct pci_dev *pdev,
addr = phys_addr + map->device_map.memdev.offset;
length = map->device_map.memdev.size;
- regs->memdev = devm_ioremap(dev, addr, length);
+ regs->memdev = devm_cxl_iomap_block(pdev, addr, length);
+ if (!regs->memdev)
+ return -ENOMEM;
}
return 0;
diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
index 3ffd5fad74b4..e1a2dbc2886b 100644
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c
@@ -1110,6 +1110,8 @@ static int cxl_mem_setup_regs(struct cxl_mem *cxlm)
goto free_maps;
}
+ pci_release_mem_regions(pdev);
+
list_for_each_entry(map, ®ister_maps, list) {
ret = cxl_map_regs(cxlm, map);
if (ret)
--
2.28.0.rc0.12.gb6a658bd00c9
next prev parent reply other threads:[~2021-05-28 0:49 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-28 0:49 [PATCH V3 0/5] Map register blocks individually ira.weiny
2021-05-28 0:49 ` [PATCH V3 1/5] cxl/mem: Introduce cxl_decode_register_block() ira.weiny
2021-05-28 0:49 ` [PATCH V3 2/5] cxl/mem: Reserve all device regions at once ira.weiny
2021-05-28 0:49 ` [PATCH V3 3/5] cxl/mem: Map registers based on capabilities ira.weiny
2021-06-04 0:50 ` [PATCH V3.1] " ira.weiny
2021-06-06 0:30 ` Dan Williams
2021-05-28 0:49 ` ira.weiny [this message]
2021-06-04 0:53 ` [PATCH V3.1] cxl/mem: Reserve individual register block regions ira.weiny
2021-05-28 0:49 ` [PATCH V3 5/5] cxl/pci: Add HDM decoder capabilities ira.weiny
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