From: Alison Schofield <alison.schofield@intel.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: Ben Widawsky <ben.widawsky@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
linux-cxl@vger.kernel.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Linux ACPI <linux-acpi@vger.kernel.org>
Subject: Re: [PATCH 2/2] cxl/acpi: Use the ACPI CFMWS to create static decoder objects
Date: Tue, 15 Jun 2021 17:01:26 -0700 [thread overview]
Message-ID: <20210616000126.GA22435@alison-desk.jf.intel.com> (raw)
In-Reply-To: <CAPcyv4jeaJwgOMWyCjQy_32gPhSq2T-7JfwRPAmDCg5qMEB+kg@mail.gmail.com>
On Tue, Jun 15, 2021 at 03:01:06PM -0700, Dan Williams wrote:
> On Tue, Jun 15, 2021 at 2:09 PM Alison Schofield
> <alison.schofield@intel.com> wrote:
> >
> > Thanks for the review Dan...
> >
> > On Tue, Jun 15, 2021 at 11:48:43AM -0700, Dan Williams wrote:
> > > [ add linu-acpi for variable length array question below ]
> > >
> > >
> > > On Mon, Jun 14, 2021 at 3:57 PM Alison Schofield
> > > <alison.schofield@intel.com> wrote:
> > > >
> > > > The ACPI CXL Early Discovery Table (CEDT) includes a list of CXL memory
> > > > resources in CXL Fixed Memory Window Structures (CFMWS). Retrieve each
> > > > CFMWS in the CEDT and add a cxl_decoder object to the root port (root0)
> > > > for each memory resource.
> > > >
> > > > Signed-off-by: Alison Schofield <alison.schofield@intel.com>
> > > > ---
> > > > drivers/cxl/acpi.c | 106 +++++++++++++++++++++++++++++++++++++++++++++
> > > > 1 file changed, 106 insertions(+)
> > > >
> > > > diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
> > > > index 16f60bc6801f..ac4b3e37e294 100644
> > > > --- a/drivers/cxl/acpi.c
> > > > +++ b/drivers/cxl/acpi.c
> > > > @@ -8,8 +8,112 @@
> > > > #include <linux/pci.h>
> > > > #include "cxl.h"
> > > >
> > > > +/* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */
> > > > +#define CFMWS_INTERLEAVE_WAYS(x) (1 << (x)->interleave_ways)
> > > > +#define CFMWS_INTERLEAVE_GRANULARITY(x) ((x)->granularity + 8)
> > > > +
> > > > +/*
> > > > + * CFMWS Restrictions mapped to CXL Decoder Flags
> > > > + * Restrictions defined in CXL 2.0 ECN CEDT CFMWS
> > > > + * Decoder Flags defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register
> > > > + */
> > > > +#define CFMWS_TO_DECODE_TYPE2(x) ((x & ACPI_CEDT_CFMWS_RESTRICT_TYPE2) << 2)
> > > > +#define CFMWS_TO_DECODE_TYPE3(x) ((x & ACPI_CEDT_CFMWS_RESTRICT_TYPE3) << 2)
> > > > +#define CFMWS_TO_DECODE_RAM(x) ((x & ACPI_CEDT_CFMWS_RESTRICT_VOLATILE) >> 2)
> > > > +#define CFMWS_TO_DECODE_PMEM(x) ((x & ACPI_CEDT_CFMWS_RESTRICT_PMEM) >> 2)
> > > > +#define CFMWS_TO_DECODE_FIXED(x) (x & ACPI_CEDT_CFMWS_RESTRICT_FIXED)
> > > > +
> > > > +#define CFMWS_TO_DECODER_FLAGS(x) (CFMWS_TO_DECODE_TYPE2(x) | \
> > > > + CFMWS_TO_DECODE_TYPE3(x) | \
> > > > + CFMWS_TO_DECODE_RAM(x) | \
> > > > + CFMWS_TO_DECODE_PMEM(x) | \
> > > > + CFMWS_TO_DECODE_FIXED(x))
> > >
> > > I don't understand the approach taken above. It seems to assume that
> > > the CXL_DECODER_F_* values are fixed. Those flag values are arbitrary
> > > and mutable. There is no guarantee that today's CXL_DECODER_F_* values
> > > match tomorrow's so I'd rather not have 2 places to check when / if
> > > that happens.
> > >
> >
> > Here's my next take - making the handling resilient.
> > Not so sure on gracefulness. Open for suggestions.
> >
> > -#define CFMWS_TO_DECODE_TYPE2(x) ((x & ACPI_CEDT_CFMWS_RESTRICT_TYPE2) << 2)
> > -#define CFMWS_TO_DECODE_TYPE3(x) ((x & ACPI_CEDT_CFMWS_RESTRICT_TYPE3) << 2)
> > -#define CFMWS_TO_DECODE_RAM(x) ((x & ACPI_CEDT_CFMWS_RESTRICT_VOLATILE) >> 2)
> > -#define CFMWS_TO_DECODE_PMEM(x) ((x & ACPI_CEDT_CFMWS_RESTRICT_PMEM) >> 2)
> > -#define CFMWS_TO_DECODE_FIXED(x) (x & ACPI_CEDT_CFMWS_RESTRICT_FIXED)
> > -
> > -#define CFMWS_TO_DECODER_FLAGS(x) (CFMWS_TO_DECODE_TYPE2(x) | \
> > - CFMWS_TO_DECODE_TYPE3(x) | \
> > - CFMWS_TO_DECODE_RAM(x) | \
> > - CFMWS_TO_DECODE_PMEM(x) | \
> > - CFMWS_TO_DECODE_FIXED(x))
> > +#define FLAG_TYPE2(x) \
> > + ((x & ACPI_CEDT_CFMWS_RESTRICT_TYPE2) ? CXL_DECODER_F_TYPE2 : 0)
> > +#define FLAG_TYPE3(x) \
> > + ((x & ACPI_CEDT_CFMWS_RESTRICT_TYPE3) ? CXL_DECODER_F_TYPE3 : 0)
> > +#define FLAG_RAM(x) \
> > + ((x & ACPI_CEDT_CFMWS_RESTRICT_VOLATILE) ? CXL_DECODER_F_RAM : 0)
> > +#define FLAG_PMEM(x) \
> > + ((x & ACPI_CEDT_CFMWS_RESTRICT_PMEM) ? CXL_DECODER_F_PMEM : 0)
> > +#define FLAG_FIXED(x) \
> > + ((x & ACPI_CEDT_CFMWS_RESTRICT_FIXED) ? CXL_DECODER_F_LOCK : 0)
> > +
> > +#define CFMWS_TO_DECODER_FLAGS(x) (FLAG_TYPE2(x) | FLAG_TYPE3(x) | \
> > + FLAG_RAM(x) | FLAG_PMEM(x)| FLAG_FIXED(x))
>
> Hmm, why the macros? Just make CFMWS_TO_DECODER_FLAGS a proper function.
>
> if (cfmws->restrictions & ACPI_CEDT_CFMWS_RESTRICT_TYPE2)
> flags |= CXL_DECODER_F_TYPE2;
>
> ...etc
>
> Unless you foresee where macros were going to be reused somewhere else
> I would just as soon open code them like above.
Open code it is!
Thanks
prev parent reply other threads:[~2021-06-16 0:05 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-14 22:52 [PATCH 0/2] CXL ACPI tables for object creation Alison Schofield
2021-06-14 22:52 ` [PATCH 1/2] cxl/acpi: Add the Host Bridge base address to CXL port objects Alison Schofield
2021-06-14 22:52 ` [PATCH 2/2] cxl/acpi: Use the ACPI CFMWS to create static decoder objects Alison Schofield
2021-06-15 18:48 ` Dan Williams
2021-06-15 21:05 ` Alison Schofield
2021-06-15 22:01 ` Dan Williams
2021-06-16 0:01 ` Alison Schofield [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210616000126.GA22435@alison-desk.jf.intel.com \
--to=alison.schofield@intel.com \
--cc=ben.widawsky@intel.com \
--cc=dan.j.williams@intel.com \
--cc=ira.weiny@intel.com \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-cxl@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=vishal.l.verma@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox