From: Ben Widawsky <ben.widawsky@intel.com>
To: linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org
Cc: Ben Widawsky <ben.widawsky@intel.com>,
Alison Schofield <alison.schofield@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Jonathan Cameron <Jonathan.Cameron@Huawei.com>,
Vishal Verma <vishal.l.verma@intel.com>
Subject: [PATCH 2/7] cxl/pci: Remove dev_dbg for unknown register blocks
Date: Tue, 21 Sep 2021 15:04:54 -0700 [thread overview]
Message-ID: <20210921220459.2437386-3-ben.widawsky@intel.com> (raw)
In-Reply-To: <20210921220459.2437386-1-ben.widawsky@intel.com>
While interesting to driver developers, the dev_dbg message doesn't do
much except clutter up logs. This information should be attainable
through sysfs, and someday lspci like utilities. This change
additionally helps reduce the LOC in a subsequent patch to refactor some
of cxl_pci register mapping.
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
---
drivers/cxl/pci.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
index 64180f46c895..ccc7c2573ddc 100644
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c
@@ -475,9 +475,6 @@ static int cxl_pci_setup_regs(struct cxl_mem *cxlm)
cxl_decode_register_block(reg_lo, reg_hi, &bar, &offset,
®_type);
- dev_dbg(dev, "Found register block in bar %u @ 0x%llx of type %u\n",
- bar, offset, reg_type);
-
/* Ignore unknown register block types */
if (reg_type > CXL_REGLOC_RBI_MEMDEV)
continue;
--
2.33.0
next prev parent reply other threads:[~2021-09-21 22:05 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-21 22:04 [PATCH 0/7] cxl_pci refactor for reusability Ben Widawsky
2021-09-21 22:04 ` [PATCH 1/7] cxl: Convert "RBI" to enum Ben Widawsky
2021-09-21 22:04 ` Ben Widawsky [this message]
2021-09-21 22:04 ` [PATCH 3/7] cxl/pci: Refactor cxl_pci_setup_regs Ben Widawsky
2021-09-21 23:39 ` Dan Williams
2021-09-22 4:31 ` Ben Widawsky
2021-09-21 22:04 ` [PATCH 4/7] cxl/pci: Make more use of cxl_register_map Ben Widawsky
2021-09-21 22:04 ` [PATCH 5/7] PCI: Add pci_find_dvsec_capability to find designated VSEC Ben Widawsky
2021-09-22 9:33 ` Frederic Barrat
2021-09-21 22:04 ` [PATCH 6/7] cxl/pci: Use pci core's DVSEC functionality Ben Widawsky
2021-09-21 22:04 ` [PATCH 7/7] ocxl: " Ben Widawsky
2021-09-22 0:44 ` Dan Williams
2021-09-22 9:38 ` Frederic Barrat
2021-09-21 22:14 ` [PATCH 0/7] cxl_pci refactor for reusability Ben Widawsky
2021-09-21 22:28 ` Dan Williams
2021-09-21 23:03 ` Ben Widawsky
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