From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: Paolo Bonzini <pbonzini@redhat.com>, <qemu-devel@nongnu.org>,
"Michael S . Tsirkin" <mst@redhat.com>
Cc: <linux-cxl@vger.kernel.org>, <linuxarm@huawei.com>,
<alex.bennee@linaro.org>, Marcel Apfelbaum <marcel@redhat.com>,
Igor Mammedov <imammedo@redhat.com>,
Markus Armbruster <armbru@redhat.com>,
"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
Adam Manzanares <a.manzanares@samsung.com>,
Tong Zhang <ztong0001@gmail.com>,
Ben Widawsky <ben.widawsky@intel.com>,
Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Subject: [PATCH v2 6/8] tests/acpi: Update q35/CEDT.cxl for new memory addresses.
Date: Wed, 1 Jun 2022 17:42:33 +0100 [thread overview]
Message-ID: <20220601164235.2117-7-Jonathan.Cameron@huawei.com> (raw)
In-Reply-To: <20220601164235.2117-1-Jonathan.Cameron@huawei.com>
The CEDT table includes addreses of host bridge registers.
There are allocated in a different order due to the previous
patch, so update to the table is needed.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
tests/data/acpi/q35/CEDT.cxl | Bin 184 -> 184 bytes
tests/qtest/bios-tables-test-allowed-diff.h | 1 -
2 files changed, 1 deletion(-)
diff --git a/tests/data/acpi/q35/CEDT.cxl b/tests/data/acpi/q35/CEDT.cxl
index b8fa06b00e65712e91e0a5ea0d9277e0146d1c00..ff8203af070241bd23dd0eb8a51460692bb7d229 100644
GIT binary patch
delta 18
acmdnNxPx(m*~Boui7rAD&G;s!ga80Nd<HWB
delta 18
acmdnNxPx(m*~Boui7rAD&G;s!ga80Nd<HWB
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index effa58b75b..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,2 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/q35/CEDT.cxl",
--
2.32.0
next prev parent reply other threads:[~2022-06-01 16:45 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-01 16:42 [PATCH v2 0/8] hw/cxl: Move CXL emulation options and state to machines Jonathan Cameron
2022-06-01 16:42 ` [PATCH v2 1/8] hw/cxl: Make the CXL fixed memory window setup a machine parameter Jonathan Cameron
2022-06-07 22:37 ` Davidlohr Bueso
2022-06-08 12:14 ` Jonathan Cameron
2022-06-01 16:42 ` [PATCH v2 2/8] hw/acpi/cxl: Pass in the CXLState directly rather than MachineState Jonathan Cameron
2022-06-01 16:42 ` [PATCH v2 3/8] hw/cxl: Push linking of CXL targets into i386/pc rather than in machine.c Jonathan Cameron
2022-06-01 16:42 ` [PATCH v2 4/8] tests/acpi: Allow modification of q35 CXL CEDT table Jonathan Cameron
2022-06-01 16:42 ` [PATCH v2 5/8] pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup Jonathan Cameron
2022-06-01 16:42 ` Jonathan Cameron [this message]
2022-06-01 16:42 ` [PATCH v2 7/8] hw/cxl: Move the CXLState from MachineState to machine type specific state Jonathan Cameron
2022-06-01 16:42 ` [PATCH v2 8/8] hw/machine: Drop cxl_supported flag as no longer useful Jonathan Cameron
2022-06-06 17:33 ` [PATCH v2 0/8] hw/cxl: Move CXL emulation options and state to machines Ben Widawsky
2022-06-07 10:31 ` Jonathan Cameron
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