From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F3A8C433EF for ; Tue, 7 Jun 2022 10:42:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241253AbiFGKmU (ORCPT ); Tue, 7 Jun 2022 06:42:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57574 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241279AbiFGKmR (ORCPT ); Tue, 7 Jun 2022 06:42:17 -0400 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E4906C64 for ; Tue, 7 Jun 2022 03:42:14 -0700 (PDT) Received: from fraeml706-chm.china.huawei.com (unknown [172.18.147.207]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4LHRj92rf9z6H79p; Tue, 7 Jun 2022 18:41:01 +0800 (CST) Received: from lhreml710-chm.china.huawei.com (10.201.108.61) by fraeml706-chm.china.huawei.com (10.206.15.55) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2375.24; Tue, 7 Jun 2022 12:42:12 +0200 Received: from localhost (10.202.226.42) by lhreml710-chm.china.huawei.com (10.201.108.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Tue, 7 Jun 2022 11:42:11 +0100 Date: Tue, 7 Jun 2022 11:42:10 +0100 From: Jonathan Cameron To: Ben Widawsky CC: , "Michael S . Tsirkin" , "Paolo Bonzini" , , , , Marcel Apfelbaum , Igor Mammedov , Markus Armbruster , Mark Cave-Ayland , "Adam Manzanares" , Tong Zhang , Shameerali Kolothum Thodi Subject: Re: [PATCH] hw/cxl: Fix missing write mask for HDM decoder target list registers Message-ID: <20220607114210.00005e4e@Huawei.com> In-Reply-To: <20220606173952.66q3gtwtydrs7xwb@bwidawsk-mobl5> References: <20220531123953.17582-1-Jonathan.Cameron@huawei.com> <20220606173952.66q3gtwtydrs7xwb@bwidawsk-mobl5> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.29; i686-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.202.226.42] X-ClientProxiedBy: lhreml732-chm.china.huawei.com (10.201.108.83) To lhreml710-chm.china.huawei.com (10.201.108.61) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org On Mon, 6 Jun 2022 10:39:52 -0700 Ben Widawsky wrote: > On 22-05-31 13:39:53, Jonathan Cameron wrote: > > Without being able to write these registers, no interleaving is possible. > > More refined checks of HDM register state on commit to follow. > > > > Signed-off-by: Jonathan Cameron > > --- > > hw/cxl/cxl-component-utils.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c > > index 7985c9bfca..993248b5c0 100644 > > --- a/hw/cxl/cxl-component-utils.c > > +++ b/hw/cxl/cxl-component-utils.c > > @@ -174,6 +174,8 @@ static void hdm_init_common(uint32_t *reg_state, uint32_t *write_msk) > > write_msk[R_CXL_HDM_DECODER0_SIZE_LO + i * 0x20] = 0xf0000000; > > write_msk[R_CXL_HDM_DECODER0_SIZE_HI + i * 0x20] = 0xffffffff; > > write_msk[R_CXL_HDM_DECODER0_CTRL + i * 0x20] = 0x13ff; > > + write_msk[R_CXL_HDM_DECODER0_TARGET_LIST_LO + i * 0x20] = 0xffffffff; > > + write_msk[R_CXL_HDM_DECODER0_TARGET_LIST_HI + i * 0x20] = 0xffffffff; > > I wonder if this should be 0. It will be weird for endpoints to have a skip > value of 0xff. For EP _LO should be 0xf0000000. But we haven't implemented skip yet IIRC. It should be all bits set for host bridges (or switches) and that's the bug this is fixing. We have access to the device type at the caller of this function, so I can make it right for both changes with a trivial change. Will send a v2 shortly... Thanks, Jonathan > > > } > > } > > > > -- > > 2.32.0 > >