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From: Davidlohr Bueso <dave@stgolabs.net>
To: dan.j.williams@intel.com
Cc: ira.weiny@intel.com, Jonathan.Cameron@huawei.com,
	dave.jiang@intel.com, alison.schofield@intel.com,
	bwidawsk@kernel.org, vishal.l.verma@intel.com,
	a.manzanares@samsung.com, linux-cxl@vger.kernel.org,
	linux-kernel@vger.kernel.org, dave@stgolabs.net
Subject: [PATCH 2/2] cxl/mbox: Wire up irq support
Date: Mon, 17 Oct 2022 20:00:10 -0700	[thread overview]
Message-ID: <20221018030010.20913-3-dave@stgolabs.net> (raw)
In-Reply-To: <20221018030010.20913-1-dave@stgolabs.net>

With enough vectors properly allocated, this adds support for
(the primary) mailbox interrupt, which is needed for background
completion handling, beyond polling.

Signed-off-by: Davidlohr Bueso <dave@stgolabs.net>
---
 drivers/cxl/cxl.h |  1 +
 drivers/cxl/pci.c | 29 ++++++++++++++++++++++++++++-
 2 files changed, 29 insertions(+), 1 deletion(-)

diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index f680450f0b16..13a9743b0012 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -135,6 +135,7 @@ static inline int ways_to_cxl(unsigned int ways, u8 *iw)
 /* CXL 2.0 8.2.8.4 Mailbox Registers */
 #define CXLDEV_MBOX_CAPS_OFFSET 0x00
 #define   CXLDEV_MBOX_CAP_PAYLOAD_SIZE_MASK GENMASK(4, 0)
+#define   CXLDEV_MBOX_CAP_IRQ_MSGNUM_MASK GENMASK(10, 7)
 #define CXLDEV_MBOX_CTRL_OFFSET 0x04
 #define   CXLDEV_MBOX_CTRL_DOORBELL BIT(0)
 #define CXLDEV_MBOX_CMD_OFFSET 0x08
diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
index 9c3e95ebaa26..c3f3ee307d7a 100644
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c
@@ -274,6 +274,32 @@ static int cxl_pci_setup_mailbox(struct cxl_dev_state *cxlds)
 	return 0;
 }
 
+static int cxl_pci_mbox_get_max_msgnum(struct cxl_dev_state *cxlds)
+{
+	int cap;
+
+	cap = readl(cxlds->regs.mbox + CXLDEV_MBOX_CAPS_OFFSET);
+	return FIELD_GET(CXLDEV_MBOX_CAP_IRQ_MSGNUM_MASK, cap);
+}
+
+static irqreturn_t cxl_pci_mbox_irq(int irq, void *id)
+{
+	/* TODO: handle completion of background commands */
+	return IRQ_HANDLED;
+}
+
+static void cxl_pci_mbox_irqsetup(struct cxl_dev_state *cxlds)
+{
+	struct device *dev = cxlds->dev;
+	struct pci_dev *pdev = to_pci_dev(dev);
+	int irq;
+
+	irq = cxl_pci_mbox_get_max_msgnum(cxlds);
+	if (!pci_request_irq(pdev, irq, cxl_pci_mbox_irq, NULL,
+			     cxlds, "%s-mailbox", dev_name(dev)))
+		dev_dbg(dev, "Mailbox irq (%d) supported", irq);
+}
+
 static int cxl_map_regblock(struct pci_dev *pdev, struct cxl_register_map *map)
 {
 	void __iomem *addr;
@@ -442,7 +468,7 @@ struct cxl_irq_cap {
 };
 
 static const struct cxl_irq_cap cxl_irq_cap_table[] = {
-	NULL
+	{ "mailbox", cxl_pci_mbox_get_max_msgnum },
 };
 
 static void cxl_pci_free_irq_vectors(void *data)
@@ -562,6 +588,7 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 		return rc;
 
 	if (!cxl_pci_alloc_irq_vectors(cxlds)) {
+		cxl_pci_mbox_irqsetup(cxlds);
 		cxlds->has_irq = true;
 	} else
 		cxlds->has_irq = false;
-- 
2.38.0


  parent reply	other threads:[~2022-10-18  3:29 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-18  3:00 [PATCH v3 0/2] cxl: Add general MSI-X/MSI irq support Davidlohr Bueso
2022-10-18  3:00 ` [PATCH 1/2] cxl/pci: Add generic " Davidlohr Bueso
2022-10-18  9:36   ` Jonathan Cameron
2022-10-18 10:52     ` Jonathan Cameron
2022-10-20 22:31       ` Davidlohr Bueso
2022-10-21  4:18         ` Ira Weiny
2022-10-21  8:49           ` Jonathan Cameron
2022-10-21 16:20             ` Davidlohr Bueso
2022-10-21 21:05               ` Ira Weiny
2022-10-21  4:14       ` Ira Weiny
2022-10-21  8:58         ` Jonathan Cameron
2022-10-21 15:58           ` Davidlohr Bueso
2022-10-22 22:17           ` Dan Williams
2022-10-18 11:17   ` Jonathan Cameron
2022-10-22 22:05   ` Dan Williams
2022-10-24  0:09     ` Ira Weiny
2022-10-24  2:08       ` Dan Williams
2022-10-24 12:36         ` Jonathan Cameron
2022-10-25 23:25           ` Bjorn Helgaas
2022-10-30  8:38             ` Christoph Hellwig
2022-11-02 17:15             ` Davidlohr Bueso
2022-11-02 22:54               ` Bjorn Helgaas
2022-11-02 23:42               ` Ira Weiny
2022-11-03  0:18                 ` Davidlohr Bueso
2022-11-03 18:09                   ` Jonathan Cameron
2022-11-10  3:30                     ` Ira Weiny
2022-11-11 21:18                       ` Davidlohr Bueso
2022-11-03 18:08               ` Jonathan Cameron
2022-10-18  3:00 ` Davidlohr Bueso [this message]
2022-10-18  9:38   ` [PATCH 2/2] cxl/mbox: Wire up " Jonathan Cameron
2022-10-21 17:23     ` Davidlohr Bueso
2022-10-22 22:14       ` Dan Williams
2022-10-22 22:06   ` Dan Williams

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