From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA0C6C4332F for ; Mon, 21 Nov 2022 12:21:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229447AbiKUMVh (ORCPT ); Mon, 21 Nov 2022 07:21:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42490 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229626AbiKUMVe (ORCPT ); Mon, 21 Nov 2022 07:21:34 -0500 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9311751C35; Mon, 21 Nov 2022 04:21:32 -0800 (PST) Received: from fraeml713-chm.china.huawei.com (unknown [172.18.147.226]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4NG5z060tYz6HJZY; Mon, 21 Nov 2022 20:18:52 +0800 (CST) Received: from lhrpeml500005.china.huawei.com (7.191.163.240) by fraeml713-chm.china.huawei.com (10.206.15.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31; Mon, 21 Nov 2022 13:21:30 +0100 Received: from localhost (10.202.227.76) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31; Mon, 21 Nov 2022 12:21:30 +0000 Date: Mon, 21 Nov 2022 12:21:29 +0000 From: Jonathan Cameron To: Dave Jiang CC: , , , , , , , , Subject: Re: [PATCH v3 11/11] cxl/pci: Add callback to log AER correctable error Message-ID: <20221121122129.00001908@Huawei.com> In-Reply-To: <166879134802.674819.8577415268687156421.stgit@djiang5-desk3.ch.intel.com> References: <166879123216.674819.3578187187954311721.stgit@djiang5-desk3.ch.intel.com> <166879134802.674819.8577415268687156421.stgit@djiang5-desk3.ch.intel.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.202.227.76] X-ClientProxiedBy: lhrpeml500004.china.huawei.com (7.191.163.9) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org On Fri, 18 Nov 2022 10:09:08 -0700 Dave Jiang wrote: > Add AER error handler callback to read the correctable error status > register for the CXL device. Log the error as a trace event and clear the > error. > > Suggested-by: Jonathan Cameron > Signed-off-by: Dave Jiang Reviewed-by: Jonathan Cameron You may want to make it clearer in the description of patch 10 that we 'need' the callback rather than falling into the better logging category (which was what I was previously thinking!) Jonathan > --- > drivers/cxl/pci.c | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c > index dad69110291d..b394fd227949 100644 > --- a/drivers/cxl/pci.c > +++ b/drivers/cxl/pci.c > @@ -621,10 +621,30 @@ static void cxl_error_resume(struct pci_dev *pdev) > dev->driver ? "successful" : "failed"); > } > > +static void cxl_correctable_error_log(struct pci_dev *pdev) > +{ > + struct cxl_dev_state *cxlds = pci_get_drvdata(pdev); > + struct cxl_memdev *cxlmd = cxlds->cxlmd; > + struct device *dev = &cxlmd->dev; > + void __iomem *addr; > + u32 status; > + > + if (!cxlds->regs.ras) > + return; > + > + addr = cxlds->regs.ras + CXL_RAS_CORRECTABLE_STATUS_OFFSET; > + status = le32_to_cpu(readl(addr)); > + if (status & CXL_RAS_CORRECTABLE_STATUS_MASK) { > + writel(status & CXL_RAS_CORRECTABLE_STATUS_MASK, addr); Ah. I'd forgotten we need to clear this an hence 'need' the callback in the previous patch to handle this properly. > + trace_cxl_aer_correctable_error(dev_name(dev), status); > + } > +} > + > static const struct pci_error_handlers cxl_error_handlers = { > .error_detected = cxl_error_detected, > .slot_reset = cxl_slot_reset, > .resume = cxl_error_resume, > + .cor_error_log = cxl_correctable_error_log, > }; > > static struct pci_driver cxl_pci_driver = { > >