Re: I2C Multi-master and Controller Slave Mode in QEMU

[Jonathan Cameron <Jonathan.Cameron@Huawei.com>]

On Fri, 19 May 2023 19:43:25 +0000
Shesha Bhushan Sreenivasamurthy <sheshas@marvell.com> wrote:

> Hi,
>    Is there any implementation of I2C Multi-master and Controller Slave Mode in QEMU for x86 ?
> 
> What I want is to create CXL-I2C device that can exercise DCD commands via FM-API. For that I need a bus that can support both master and slave on x86. Is there one available ?

I have a side project underway to make this work.  It will be a little 'unusual'
as it'll bolt an aspeed-i2c controller with the right support onto an x86 host.
Might take me a few more days to get that working.  I have it up and running
with ACPI on an arm64 host (a few minor tweaks needed to the aspeed-i2c kernel
driver which I'll also post - mostly upstreamable but there are a couple of
hacks for now).

Currently that aspeed device is the only i2c controller that supports MCTP that has
some patches on list to do everything you want.

> 
> The second question is, can qemu-cxltype3 device be used on ARM ?

Yes, but you need the out of mainline patches from
gitlab.com/jic23/qemu Use the previous dated tag though as latest has some issues
(bad choice of base which turned out to crash :)

I'll be putting together a fixed version of that in next day or two.

https://gitlab.com/jic23/qemu/-/tree/cxl-2023-04-19?ref_type=heads
for now.

That includes support for the aspeed-i2c controller but with dt only which isn't
that helpful if you want to also use the CXL drivers.

Anyhow, it's a watch this space for now. Hopefully I'll get the PoC code in a shape
to share later this week.

Jonathan