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Date: Mon, 16 Oct 2023 11:58:38 -0500
From: Bjorn Helgaas <helgaas@kernel.org>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: linux-cxl@vger.kernel.org, Dan Williams <dan.j.williams@intel.com>,
	Ira Weiny <ira.weiny@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	Alison Schofield <alison.schofield@intel.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Davidlohr Bueso <dave@stgolabs.net>, linuxarm@huawei.com,
	Bjorn Helgaas <bhelgaas@google.com>
Subject: Re: [PATCH 3/4] PCI: Add PCI_CLASS_SERIAL_CXL_SWITCH_CCI class ID to
 pci_ids.h
Message-ID: <20231016165838.GA1214574@bhelgaas>
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In-Reply-To: <20231016125323.18318-4-Jonathan.Cameron@huawei.com>

On Mon, Oct 16, 2023 at 01:53:22PM +0100, Jonathan Cameron wrote:
> This ID is used for CXL Switch Mailbox CCIs.
> Incorporate the Programming Interface in the definition in common
> with similar entries.
> 
> See CXL rev3.0 81.1.3.1 PCI Header Class Code Register

Also PCI Code and ID Assignment r1.15, sec 1.13, which I assume is
definitive since this is a piece of the PCI namespace.

> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Acked-by: Bjorn Helgaas <bhelgaas@google.com>

> ---
>  include/linux/pci_ids.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index 5fb3d4c393a9..27d1bac65256 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -128,6 +128,7 @@
>  #define PCI_CLASS_SERIAL_IPMI_SMIC	0x0c0700
>  #define PCI_CLASS_SERIAL_IPMI_KCS	0x0c0701
>  #define PCI_CLASS_SERIAL_IPMI_BT	0x0c0702
> +#define PCI_CLASS_SERIAL_CXL_SWITCH_CCI	0x0c0b00
>  
>  #define PCI_BASE_CLASS_WIRELESS			0x0d
>  #define PCI_CLASS_WIRELESS_RF_CONTROLLER	0x0d10
> -- 
> 2.39.2
>