From: Bjorn Helgaas <helgaas@kernel.org>
To: "Kobayashi,Daisuke" <kobayashi.da-06@fujitsu.com>
Cc: kobayashi.da-06@jp.fujitsu.com, linux-cxl@vger.kernel.org,
y-goto@fujitsu.com, linux-pci@vger.kernel.org, mj@ucw.cz,
dan.j.williams@intel.com
Subject: Re: [PATCH v4 3/3] cxl/pci: Add sysfs attribute for CXL 1.1 device link status
Date: Tue, 9 Apr 2024 10:05:40 -0500 [thread overview]
Message-ID: <20240409150540.GA2076036@bhelgaas> (raw)
In-Reply-To: <20240409073528.13214-4-kobayashi.da-06@fujitsu.com>
On Tue, Apr 09, 2024 at 04:35:28PM +0900, Kobayashi,Daisuke wrote:
> Add sysfs attribute for CXL 1.1 device link status to the cxl pci device.
>
> In CXL1.1, the link status of the device is included in the RCRB mapped to
> the memory mapped register area. Critically, that arrangement makes the link
> status and control registers invisible to existing PCI user tooling.
Idle thought: PCIe does define RCRB, even pre-CXL. Maybe the PCI core
should be enhanced to comprehend RCRB directly?
> +static ssize_t rcd_link_status_show(struct device *dev,
> + struct device_attribute *attr, char *buf)
> +{
> + struct cxl_port *port;
> + struct cxl_dport *dport;
> + struct device *parent = dev->parent;
> + struct pci_dev *parent_pdev = to_pci_dev(parent);
> +
> + port = cxl_pci_find_port(parent_pdev, &dport);
> + if (!port)
> + return -EINVAL;
> +
> + return sysfs_emit(buf, "%x\n", dport->rcrb.rcd_lnkstatus);
Is it really what you want to capture PCI_EXP_LNKSTA once at
enumeration-time and expose that static value forever? I assume
status bits can change over time, so I would naively expect that you
want the *current* value, not just a value from the distant past.
Bjorn
next prev parent reply other threads:[~2024-04-09 15:05 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-09 7:35 [PATCH v4 0/3] cxl: Export cxl1.1 device link status to sysfs Kobayashi,Daisuke
2024-04-09 7:35 ` [PATCH v4 1/3] cxl: Add rcd_regs to cxl_rcrb_info Kobayashi,Daisuke
2024-04-09 19:08 ` Dave Jiang
2024-04-09 7:35 ` [PATCH v4 2/3] cxl/core/regs: Add rcd_regs initialization at __rcrb_to_component() Kobayashi,Daisuke
2024-04-09 19:15 ` Dave Jiang
2024-04-10 7:14 ` Daisuke Kobayashi (Fujitsu)
2024-04-09 7:35 ` [PATCH v4 3/3] cxl/pci: Add sysfs attribute for CXL 1.1 device link status Kobayashi,Daisuke
2024-04-09 15:05 ` Bjorn Helgaas [this message]
2024-04-09 18:04 ` Dan Williams
2024-04-09 22:18 ` Lukas Wunner
2024-04-09 21:33 ` Dan Williams
2024-04-09 21:47 ` Dan Williams
2024-04-10 7:22 ` Daisuke Kobayashi (Fujitsu)
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