Linux CXL
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From: Yao Xingtao <yaoxt.fnst@fujitsu.com>
To: dave@stgolabs.net, jonathan.cameron@huawei.com,
	dave.jiang@intel.com, alison.schofield@intel.com,
	vishal.l.verma@intel.com, ira.weiny@intel.com,
	dan.j.williams@intel.com, jim.harris@samsung.com
Cc: linux-cxl@vger.kernel.org, Yao Xingtao <yaoxt.fnst@fujitsu.com>
Subject: [PATCH v4 1/2] cxl/core: add passthrough flag to struct cxl_switch_decoder
Date: Mon, 22 Apr 2024 05:13:49 -0400	[thread overview]
Message-ID: <20240422091350.4701-2-yaoxt.fnst@fujitsu.com> (raw)
In-Reply-To: <20240422091350.4701-1-yaoxt.fnst@fujitsu.com>

Per CXL specification (8.2.4.20 CXL HDM Decoder Capability Structure in
r3.1), the host-bridges with single port and switches with single dport are
not affiliated with any instance of the HDM capability structure.

Driver will add a passthrough decoder for each of them during init, so the
constraints imposed by the HDM capability structure do not apply to the
passthrough decoders.

By utilizing this flag, we can swiftly ascertain whether a switch decoder
qualifies as a passthrough decoder, thereby avoiding the need to conduct a
string of capability constraint checks.

Signed-off-by: Yao Xingtao <yaoxt.fnst@fujitsu.com>
---
 drivers/cxl/core/hdm.c | 1 +
 drivers/cxl/cxl.h      | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
index 7d97790b893d..27fb4f9d489e 100644
--- a/drivers/cxl/core/hdm.c
+++ b/drivers/cxl/core/hdm.c
@@ -57,6 +57,7 @@ int devm_cxl_add_passthrough_decoder(struct cxl_port *port)
 	if (IS_ERR(cxlsd))
 		return PTR_ERR(cxlsd);
 
+	cxlsd->passthrough = true;
 	device_lock_assert(&port->dev);
 
 	xa_for_each(&port->dports, index, dport)
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index 036d17db68e0..6f562baa164f 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -415,6 +415,7 @@ struct cxl_endpoint_decoder {
  * struct cxl_switch_decoder - Switch specific CXL HDM Decoder
  * @cxld: base cxl_decoder object
  * @nr_targets: number of elements in @target
+ * @passthrough: indicate whether the decoder is passthrough
  * @target: active ordered target list in current decoder configuration
  *
  * The 'switch' decoder type represents the decoder instances of cxl_port's that
@@ -426,6 +427,7 @@ struct cxl_endpoint_decoder {
 struct cxl_switch_decoder {
 	struct cxl_decoder cxld;
 	int nr_targets;
+	bool passthrough;
 	struct cxl_dport *target[];
 };
 
-- 
2.37.3


  reply	other threads:[~2024-04-22  9:15 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-22  9:13 [PATCH v4 0/2] cxl/region: add interleave capability check Yao Xingtao
2024-04-22  9:13 ` Yao Xingtao [this message]
2024-04-22 11:12   ` [PATCH v4 1/2] cxl/core: add passthrough flag to struct cxl_switch_decoder Jonathan Cameron
2024-04-22 23:56     ` Xingtao Yao (Fujitsu)
2024-04-23  0:37   ` Dan Williams
2024-04-22  9:13 ` [PATCH v4 2/2] cxl/region: check interleave capability Yao Xingtao
2024-04-22 11:17   ` Jonathan Cameron
2024-04-23  0:02     ` Xingtao Yao (Fujitsu)
2024-04-23  0:59   ` Dan Williams
2024-04-23  2:47     ` Xingtao Yao (Fujitsu)
2024-05-12 23:43       ` Xingtao Yao (Fujitsu)
2024-05-23  9:05         ` Xingtao Yao (Fujitsu)
2024-05-23 18:47         ` Dan Williams
2024-05-24  9:15           ` Xingtao Yao (Fujitsu)

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