From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: "Daisuke Kobayashi (Fujitsu)" <kobayashi.da-06@fujitsu.com>
Cc: "linux-cxl@vger.kernel.org" <linux-cxl@vger.kernel.org>,
"Yasunori Gotou (Fujitsu)" <y-goto@fujitsu.com>,
"mj@ucw.cz" <mj@ucw.cz>,
"dan.j.williams@intel.com" <dan.j.williams@intel.com>
Subject: Re: [PATCH v12 1/2] cxl/core/regs: Add rcd_pcie_cap initialization
Date: Fri, 14 Jun 2024 15:40:51 +0100 [thread overview]
Message-ID: <20240614154051.00001c47@Huawei.com> (raw)
In-Reply-To: <OSAPR01MB7182B37FB0600712947C6C2CBAC22@OSAPR01MB7182.jpnprd01.prod.outlook.com>
On Fri, 14 Jun 2024 09:51:55 +0000
"Daisuke Kobayashi (Fujitsu)" <kobayashi.da-06@fujitsu.com> wrote:
> Jonathan Cameron wrote:
> > On Fri, 14 Jun 2024 13:56:10 +0900
> > "Kobayashi,Daisuke" <kobayashi.da-06@fujitsu.com> wrote:
> >
> > > Add rcd_pcie_cap and its initialization to cache the offset of cxl1.1
> > > device link status information. By caching it, avoid the walking
> > > memory map area to find the offset when output the register value.
> > >
> > > Signed-off-by: "Kobayashi,Daisuke" <kobayashi.da-06@fujitsu.com>
> > Hi.
> >
> > A couple more change inline. Problem with evolving code is that as a reviewer
> > I sometime forget to check my expectations. This now stores a variable in a
> > core structure just to use it once a few lines later. No point in keeping it.
> > Looking at that made me notice the error returns were wrong and unhandled.
> >
> Thank you for your kind review. I can't post the next version this week,
> but let me check if my understanding is correct.
>
> > > ---
> > > drivers/cxl/core/core.h | 6 ++++
> > > drivers/cxl/core/regs.c | 62
> > +++++++++++++++++++++++++++++++++++++++++
> > > drivers/cxl/cxl.h | 10 +++++++
> > > drivers/cxl/pci.c | 7 +++--
> > > 4 files changed, 83 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h index
> > > 3b64fb1b9ed0..69006bde7ad5 100644
> > > --- a/drivers/cxl/core/core.h
> > > +++ b/drivers/cxl/core/core.h
> > > @@ -74,6 +74,12 @@ resource_size_t __rcrb_to_component(struct device
> > *dev,
> > > struct cxl_rcrb_info *ri,
> > > enum cxl_rcrb which);
> > > u16 cxl_rcrb_to_aer(struct device *dev, resource_size_t rcrb);
> > > +resource_size_t cxl_rcrb_to_linkcap(struct device *dev, struct
> > > +cxl_dport *dport);
> > > +
> > > +#define PCI_RCRB_CAP_LIST_ID_MASK GENMASK(7, 0)
> > > +#define PCI_RCRB_CAP_HDR_ID_MASK GENMASK(7, 0)
> > > +#define PCI_RCRB_CAP_HDR_NEXT_MASK GENMASK(15, 8)
> > > +#define PCI_CAP_EXP_SIZEOF 0x3c
> >
> > I'd like a follow up patch making these defines apply for all usage of these fields
> > in the PCI core code. Right now there are pointless hard coded values.
> >
> Does this mean that you want me to post another patch later that
> defines PCI_CAP_EXP_SIZEOF to replace the hardcoded value in the PCI core code?
> If so, I'll create a follow-up patch in the future.
Yes but also include the masks for the fields of a PCI capability.
So definitely the last 3 defines. For the first one is the PCIExpress
Capabilities pointer mask, but it is carefully constructed
to line up with the pointers in the PCI capabilities themselves
so you can probably share a define for the first 2.
>
> > >
> > > extern struct rw_semaphore cxl_dpa_rwsem; extern struct rw_semaphore
> > > cxl_region_rwsem; diff --git a/drivers/cxl/core/regs.c
> > > b/drivers/cxl/core/regs.c index 372786f80955..96c2a289cfb7 100644
> > > --- a/drivers/cxl/core/regs.c
> > > +++ b/drivers/cxl/core/regs.c
> > > @@ -505,6 +505,68 @@ u16 cxl_rcrb_to_aer(struct device *dev,
> > resource_size_t rcrb)
> > > return offset;
> > > }
> > >
> > > +resource_size_t cxl_rcrb_to_linkcap(struct device *dev, struct
> > > +cxl_dport *dport) {
> > > + resource_size_t rcrb = dport->rcrb.base;
> > > + void __iomem *addr;
> > > + u32 cap_hdr;
> > > + u16 offset;
> > > +
> > > + if (!request_mem_region(rcrb, SZ_4K, "CXL RCRB"))
> > > + return CXL_RESOURCE_NONE;
> > > +
> > > + addr = ioremap(rcrb, SZ_4K);
> > > + if (!addr) {
> > > + dev_err(dev, "Failed to map region %pr\n", addr);
> > > + release_mem_region(rcrb, SZ_4K);
> > > + return CXL_RESOURCE_NONE;
> >
> > If you hit this then the value returned will be all fs.
> > We are treating and offset of 0 as the error return below.
> >
> I will change the return type to int and return 0 on error. Does this match your intent?
I was suggesting returning CXL_RESOURCE_NONE on error rather than 0
0 is normally success in Linux, you could have used an int and returned < 0
for the error paths -EINVAL or similar. I don't really mind which
you chose between that and returning CXL_RESOURCE_NONE in all the failure
paths.
Jonathan
next prev parent reply other threads:[~2024-06-14 14:40 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-14 4:56 [PATCH v12 0/2] Export cxl1.1 device link status register value to pci device sysfs Kobayashi,Daisuke
2024-06-14 4:56 ` [PATCH v12 1/2] cxl/core/regs: Add rcd_pcie_cap initialization Kobayashi,Daisuke
2024-06-14 8:30 ` Jonathan Cameron
2024-06-14 9:51 ` Daisuke Kobayashi (Fujitsu)
2024-06-14 14:40 ` Jonathan Cameron [this message]
2024-06-14 4:56 ` [PATCH v12 2/2] cxl/pci: Add sysfs attribute for CXL 1.1 device link status Kobayashi,Daisuke
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240614154051.00001c47@Huawei.com \
--to=jonathan.cameron@huawei.com \
--cc=dan.j.williams@intel.com \
--cc=kobayashi.da-06@fujitsu.com \
--cc=linux-cxl@vger.kernel.org \
--cc=mj@ucw.cz \
--cc=y-goto@fujitsu.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox