Re: [PATCH v3 23/25] cxl/mem: Trace Dynamic capacity Event Record

Dave Jiang
2024-08-20T22:54:58Z

On 8/16/24 7:44 AM, ira.weiny@intel.com wrote:
> From: Navneet Singh <navneet.singh@intel.com>
>
> CXL rev 3.1 section 8.2.9.2.1 adds the Dynamic Capacity Event Records.
> User space can use trace events for debugging of DC capacity changes.
>
> Add DC trace points to the trace log.
>
> Signed-off-by: Navneet Singh <navneet.singh@intel.com>
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>

small nit below

>
> ---
> Changes:
> [Alison: Update commit message]
> ---
> drivers/cxl/core/mbox.c | 4 +++
> drivers/cxl/core/trace.h | 65 ++++++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 69 insertions(+)
>
> diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c
> index d43ac8eabf56..8202fc6c111d 100644
> --- a/drivers/cxl/core/mbox.c
> +++ b/drivers/cxl/core/mbox.c
> @@ -977,6 +977,10 @@ static void __cxl_event_trace_record(const struct cxl_memdev *cxlmd,
> ev_type = CXL_CPER_EVENT_DRAM;
> else if (uuid_equal(uuid, &CXL_EVENT_MEM_MODULE_UUID))
> ev_type = CXL_CPER_EVENT_MEM_MODULE;
> + else if (uuid_equal(uuid, &CXL_EVENT_DC_EVENT_UUID)) {
> + trace_cxl_dynamic_capacity(cxlmd, type, &record->event.dcd);
> + return;
> + }
>
> cxl_event_trace_record(cxlmd, type, ev_type, uuid, &record->event);
> }
> diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
> index 9167cfba7f59..a3a5269311ee 100644
> --- a/drivers/cxl/core/trace.h
> +++ b/drivers/cxl/core/trace.h
> @@ -731,6 +731,71 @@ TRACE_EVENT(cxl_poison,
> )
> );
>
> +/*
> + * DYNAMIC CAPACITY Event Record - DER
> + *
> + * CXL rev 3.0 section 8.2.9.2.1.5 Table 8-47

Should we just use 3.1 since it's the latest?

> + */
> +
> +#define CXL_DC_ADD_CAPACITY 0x00
> +#define CXL_DC_REL_CAPACITY 0x01
> +#define CXL_DC_FORCED_REL_CAPACITY 0x02
> +#define CXL_DC_REG_CONF_UPDATED 0x03
> +#define show_dc_evt_type(type) __print_symbolic(type, \
> + { CXL_DC_ADD_CAPACITY, "Add capacity"}, \
> + { CXL_DC_REL_CAPACITY, "Release capacity"}, \
> + { CXL_DC_FORCED_REL_CAPACITY, "Forced capacity release"}, \
> + { CXL_DC_REG_CONF_UPDATED, "Region Configuration Updated" } \
> +)
> +
> +TRACE_EVENT(cxl_dynamic_capacity,
> +
> + TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log,
> + struct cxl_event_dcd *rec),
> +
> + TP_ARGS(cxlmd, log, rec),
> +
> + TP_STRUCT__entry(
> + CXL_EVT_TP_entry
> +
> + /* Dynamic capacity Event */
> + __field(u8, event_type)
> + __field(u16, hostid)
> + __field(u8, region_id)
> + __field(u64, dpa_start)
> + __field(u64, length)
> + __array(u8, tag, CXL_EXTENT_TAG_LEN)
> + __field(u16, sh_extent_seq)
> + ),
> +
> + TP_fast_assign(
> + CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr);
> +
> + /* Dynamic_capacity Event */
> + __entry->event_type = rec->event_type;
> +
> + /* DCD event record data */
> + __entry->hostid = le16_to_cpu(rec->host_id);
> + __entry->region_id = rec->region_index;
> + __entry->dpa_start = le64_to_cpu(rec->extent.start_dpa);
> + __entry->length = le64_to_cpu(rec->extent.length);
> + memcpy(__entry->tag, &rec->extent.tag, CXL_EXTENT_TAG_LEN);
> + __entry->sh_extent_seq = le16_to_cpu(rec->extent.shared_extn_seq);
> + ),
> +
> + CXL_EVT_TP_printk("event_type='%s' host_id='%d' region_id='%d' " \
> + "starting_dpa=%llx length=%llx tag=%s " \
> + "shared_extent_sequence=%d",
> + show_dc_evt_type(__entry->event_type),
> + __entry->hostid,
> + __entry->region_id,
> + __entry->dpa_start,
> + __entry->length,
> + __print_hex(__entry->tag, CXL_EXTENT_TAG_LEN),
> + __entry->sh_extent_seq
> + )
> +);
> +
> #endif /* _CXL_EVENTS_H */
>
> #define TRACE_INCLUDE_FILE trace
>