Re: [PATCH v3 09/25] cxl/hdm: Add dynamic capacity size support to endpoint decoders

Ira Weiny
2024-08-23T02:26:51Z

Dave Jiang wrote:
>
>
> On 8/16/24 7:44 AM, ira.weiny@intel.com wrote:
> > From: Navneet Singh <navneet.singh@intel.com>
> >

[snip]

> > +static int dc_mode_to_region_index(enum cxl_decoder_mode mode)
> > +{
> > + return mode - CXL_DECODER_DC0;
> > +}
> > +
> > +static int cxl_request_skip(struct cxl_endpoint_decoder *cxled,
> > + resource_size_t skip_base, resource_size_t skip_len)
> > +{
> > + struct cxl_dev_state *cxlds = cxled_to_memdev(cxled)->cxlds;
> > + const char *name = dev_name(&cxled->cxld.dev);
> > + struct cxl_port *port = cxled_to_port(cxled);
> > + struct resource *dpa_res = &cxlds->dpa_res;
> > + struct device *dev = &port->dev;
> > + struct resource *res;
> > + int rc;
> > +
> > + res = __request_region(dpa_res, skip_base, skip_len, name, 0);
> > + if (!res)
> > + return -EBUSY;
> > +
> > + rc = xa_insert(&cxled->skip_res, skip_base, res, GFP_KERNEL);
>
> Maybe rename skip_res to skip_xa, given most of the vars in CXL with
> _res are 'struct resource' to avoid confusion. See 'dpa_res' above.
>

Good idea.
[done]

> > + if (rc) {
> > + __release_region(dpa_res, skip_base, skip_len);
> > + return rc;
> > + }
> > +
> > + dev_dbg(dev, "decoder%d.%d: skipped space; %pr\n",
> > + port->id, cxled->cxld.id, res);
> > + return 0;
> > +}
> > +
> > +static int cxl_reserve_dpa_skip(struct cxl_endpoint_decoder *cxled,
> > + resource_size_t base, resource_size_t skipped)
> > +{
> > + struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
> > + struct cxl_port *port = cxled_to_port(cxled);
> > + struct cxl_dev_state *cxlds = cxlmd->cxlds;
> > + resource_size_t skip_base = base - skipped;
> > + struct device *dev = &port->dev;
> > + resource_size_t skip_len = 0;
> > + int rc, index;
> > +
> > + if (resource_size(&cxlds->ram_res) && skip_base <= cxlds->ram_res.end) {
> > + skip_len = cxlds->ram_res.end - skip_base + 1;
> > + rc = cxl_request_skip(cxled, skip_base, skip_len);
> > + if (rc)
> > + return rc;
> > + skip_base += skip_len;
> > + }
> > +
> > + if (skip_base == base) {
> > + dev_dbg(dev, "skip done ram!\n");
> > + return 0;
> > + }
> > +
> > + if (resource_size(&cxlds->pmem_res) &&
> > + skip_base <= cxlds->pmem_res.end) {
> > + skip_len = cxlds->pmem_res.end - skip_base + 1;
> > + rc = cxl_request_skip(cxled, skip_base, skip_len);
> > + if (rc)
> > + return rc;
> > + skip_base += skip_len;
> > + }
>
> Does 'skip_base == base' need to be checked here again before going to DCD?

No it is checked below...

>
> DJ
>
> > +
> > + index = dc_mode_to_region_index(cxled->mode);
> > + for (int i = 0; i <= index; i++) {
> > + struct resource *dcr = &cxlds->dc_res[i];
> > +
> > + if (skip_base < dcr->start) {
> > + skip_len = dcr->start - skip_base;
> > + rc = cxl_request_skip(cxled, skip_base, skip_len);
> > + if (rc)
> > + return rc;
> > + skip_base += skip_len;
> > + }
> > +
> > + if (skip_base == base) {
> > + dev_dbg(dev, "skip done DC region %d!\n", i);
> > + break;
> > + }

... here.

After any skips between pmem and the first DC partition.
Ira

> > +
> > + if (resource_size(dcr) && skip_base <= dcr->end) {
> > + if (skip_base > base) {
> > + dev_err(dev, "Skip error DC region %d; skip_base %pa; base %pa\n",
> > + i, &skip_base, &base);
> > + return -ENXIO;
> > + }
> > +
> > + skip_len = dcr->end - skip_base + 1;
> > + rc = cxl_request_skip(cxled, skip_base, skip_len);
> > + if (rc)
> > + return rc;
> > + skip_base += skip_len;
> > + }
> > + }
> > +
> > + return 0;
> > +}
> > +

[snip]