Re: [PATCH 15/15] cxl/pci: Enable internal CE/UCE interrupts for CXL PCIe port devices

Terry Bowman
2024-10-16T17:24:15Z

Hi Jonathan,

On 10/16/24 12:21, Jonathan Cameron wrote:
> On Tue, 8 Oct 2024 17:16:57 -0500
> Terry Bowman <terry.bowman@amd.com> wrote:
>
>> The AER service drivers and CXL drivers are updated to handle PCIe
>> port protocol errors. But, the PCIe AER correctable and uncorrectable
>> internal errors are mask disabled for the PCIe port devices.
>>
>> Enable the AER internal errors for CXL PCIe port devices.
>>
>> Signed-off-by: Terry Bowman <terry.bowman@amd.com>
>
> A while back I thought we had a discussion about just enabling these
> for all devices and seeing if anyone screamed?
>
> I'd love to do that rather than carefully enabling them for CXL devices
> only ;)
>
> If not, this looks fine to me.
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>

These last 2 patches will be removed for v2. This is not necessary.
Internal AER errors for root ports and RCECs handling are already enabled
by the AER driver.

Regards,
Terry