Re: [PATCH 12/15] cxl/pci: Add error handler for CXL PCIe port RAS errors

Bowman, Terry
2024-10-17T16:42:36Z

Hi Jonathan,

On 10/17/2024 8:57 AM, Jonathan Cameron wrote:
> On Tue, 8 Oct 2024 17:16:54 -0500
> Terry Bowman <terry.bowman@amd.com> wrote:
>
>> The CXL drivers do not contain error handlers for CXL PCIe port
>> device protocol errors. These are needed in order to handle and log
>> RAS protocol errors.
>>
>> Add CXL PCIe port protocol error handlers to the CXL driver.
>>
>> Provide access to RAS registers for the specific CXL PCIe port types:
>> root port, upstream switch port, and downstream switch port.
>>
>> Also, register and unregister the CXL PCIe port error handlers with
>> the AER service driver using register_cxl_port_err_hndlrs() and
>> unregister_cxl_port_err_hndlrs(). Invoke the registration from
>> cxl_pci_driver_init() and the unregistration from cxl_pci_driver_exit().
>>
>> [1] CXL3.1 - 12.2.2 CXL Root Ports, Downstream Switch Ports, and
>> Upstream Switch Ports
>>
>> Signed-off-by: Terry Bowman <terry.bowman@amd.com>
> A few comments inline.
>
> Jonathan
>
>> ---
>> drivers/cxl/core/pci.c | 83 ++++++++++++++++++++++++++++++++++++++++++
>> drivers/cxl/cxl.h | 5 +++
>> drivers/cxl/pci.c | 8 ++++
>> 3 files changed, 96 insertions(+)
>>
>> diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
>> index c3c82c051d73..7e3770f7a955 100644
>> --- a/drivers/cxl/core/pci.c
>> +++ b/drivers/cxl/core/pci.c
>> @@ -815,6 +815,89 @@ static void cxl_disable_rch_root_ints(struct cxl_dport *dport)
>> }
>> }
>>
>> +static int match_uport(struct device *dev, const void *data)
>> +{
>> + struct device *uport_dev = (struct device *)data;
>> + struct cxl_port *port;
>> +
>> + if (!is_cxl_port(dev))
>> + return 0;
>> +
>> + port = to_cxl_port(dev);
>> +
>> + return port->uport_dev == uport_dev;
>> +}
>> +
>> +static void __iomem *cxl_pci_port_ras(struct pci_dev *pdev)
>> +{
>> + void __iomem *ras_base;
>> + struct cxl_port *port;
>> +
>> + if (!pdev)
>> + return NULL;
> Why would this happen? Seems an odd check to have so maybe a comment.
>

This is called directly from cxl_port_err_detected() and cxl_cor_port_err_detected().
We moved the pdev validation check into cxl_pci_port_ras().

>> +
>> + if ((pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT) ||
>> + (pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM)) {
>> + struct cxl_dport *dport;
>> +
>> + port = find_cxl_port(&pdev->dev, &dport);
> Can in theory fail>> + ras_base = dport ? dport->regs.ras : NULL;
>> + put_device(&port->dev);
> If it fails this is a null pointer dereference.
>
>> + return ras_base;
>> + } else if (pci_pcie_type(pdev) == PCI_EXP_TYPE_UPSTREAM) {
>> + struct device *port_dev __free(put_device);
>
> Should be combined with the next line. We want it to be hard for anyone
> to put code in between!
>
>> +
>> + port_dev = bus_find_device(&cxl_bus_type, NULL, &pdev->dev, match_uport);
>> + if (!port_dev)
>> + return NULL;
>> +
>> + port = to_cxl_port(port_dev);
>> + if (!port)
>> + return NULL;
>> +
>> + ras_base = port ? port->uport_regs.ras : NULL;
>
> Given check above, port exists. Remove one of the two
> checks.
>
>> + return ras_base;
>> + }
>> +
>> + return NULL;
>> +}

I have v2 changed (not posted yet) to use the following at the top of the function for the
if and else blocks using 'port'. Is not needed for dport.

struct cxl_port *port __free(put_cxl_port) = NULL;

Regards,
Terry