From: Dave Jiang <dave.jiang@intel.com>
To: linux-cxl@vger.kernel.org
Cc: dave@stgolabs.net, jonathan.cameron@huawei.com,
alison.schofield@intel.com, vishal.l.verma@intel.com,
ira.weiny@intel.com, dan.j.williams@intel.com, gourry@gourry.net
Subject: [PATCH 3/4] cxl: docs/platform/acpi/srat Add generic target documentation
Date: Tue, 13 May 2025 17:31:32 -0700 [thread overview]
Message-ID: <20250514003133.584401-4-dave.jiang@intel.com> (raw)
In-Reply-To: <20250514003133.584401-1-dave.jiang@intel.com>
Add description in the SRAT document to descript the Generic Port
Affinity sub-table.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
.../driver-api/cxl/platform/acpi/srat.rst | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/Documentation/driver-api/cxl/platform/acpi/srat.rst b/Documentation/driver-api/cxl/platform/acpi/srat.rst
index cc7687645de7..500413b96e70 100644
--- a/Documentation/driver-api/cxl/platform/acpi/srat.rst
+++ b/Documentation/driver-api/cxl/platform/acpi/srat.rst
@@ -42,3 +42,24 @@ Example ::
Enabled : 1
Hot Pluggable : 1
Non-Volatile : 0
+
+
+Generic Port Affinity
+=====================
+The Generic Port Affinity subtable provides an association between a proximity
+domain and a device handle representing a Generic Port such as a CXL host
+bridge. With the association, latency and bandwidth numbers can be retrieved
+from the SRAT for the path between CPU(s) (initiator) and the Generic Port.
+This helps with constructing the performance coordinates for CXL devices that
+are hot-plugged and not able to be enumerated by the platform firmware.
+
+Example ::
+
+ Subtable Type : 06 [Generic Port Affinity]
+ Length : 20 <- 32d, length of table
+ Reserved : 00
+ Device Handle Type : 00 <- 0 - ACPI, 1 - PCI
+ Proximity Domain : 00000001
+ Device Handle : ACPI0016:01
+ Flags : 00000001 <- Bit 0 (Enabled)
+ Reserved : 00000000
--
2.49.0
next prev parent reply other threads:[~2025-05-14 0:31 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-14 0:31 [PATCH 0/4] cxl: Update CXL documentation for access coordinates calculation Dave Jiang
2025-05-14 0:31 ` [PATCH 1/4] cxl: docs/platform/cdat reference documentation Dave Jiang
2025-05-14 16:12 ` Gregory Price
2025-05-14 19:02 ` Dave Jiang
2025-05-14 21:59 ` Gregory Price
2025-05-14 22:15 ` Dave Jiang
2025-05-14 0:31 ` [PATCH 2/4] cxl: docs/platform/acpi/srat fix memory table misalignment Dave Jiang
2025-05-14 1:40 ` Gregory Price
2025-05-14 15:22 ` Dave Jiang
2025-05-14 0:31 ` Dave Jiang [this message]
2025-05-14 16:15 ` [PATCH 3/4] cxl: docs/platform/acpi/srat Add generic target documentation Gregory Price
2025-05-14 0:31 ` [PATCH 4/4] cxl: doc/linux/access-coordinates Update access coordinates calculation methods Dave Jiang
2025-05-14 16:30 ` Gregory Price
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