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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jul 2025 21:50:14.2101 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e99c3ec3-2a26-46fc-c585-08ddcfb310af X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E3.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7701 Add an error isolation handler for type 3 CXL devices. The current behavior is to log any AER information and then panic. Signed-off-by: Ben Cheatham --- drivers/cxl/pci.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index 2a56936ac4f2..b0f2400c6ac9 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -900,6 +900,13 @@ static struct attribute_group cxl_rcd_group = { }; __ATTRIBUTE_GROUPS(cxl_rcd); +static enum cxl_err_results +cxl_pci_isolation_handler(struct cxl_dev_state *cxlds, bool lnk_down) +{ + cxl_error_detected(cxlds->dev); + return CXL_ERR_PANIC; +} + static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct pci_host_bridge *host_bridge = pci_find_host_bridge(pdev->bus); @@ -1006,6 +1013,8 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) if (rc) dev_dbg(&pdev->dev, "No CXL Features discovered\n"); + cxlds->isolation_handler = cxl_pci_isolation_handler; + cxlmd = devm_cxl_add_memdev(&pdev->dev, cxlds); if (IS_ERR(cxlmd)) return PTR_ERR(cxlmd); -- 2.34.1