From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D8CB2D97AB for ; Wed, 17 Sep 2025 14:16:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.176.79.56 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758118596; cv=none; b=YGZgu34GOX1KBTXYidhSpXSx8C3bEt6bjj2FjfKkLdGqBA4Febq6XDvnzq1ic0EDMFh6A2KYXZP5k/0k9UVey6W3ZljAaqaVcHM/AEbM5U81y/IwGgdM/cIIJF2O77w6mFhfAah9IlT6+zCagCm5jTaQrk1x9ltbPKaDgxIRvFg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758118596; c=relaxed/simple; bh=K7uXsK3I47r1KoJSrqsRj7CGNk7x3dU43CRWfGmtPmY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=J2E1ehpmtGZtwL9II+laY+9C3ySPGdq2oNfC1NTCrnTnD3lFuYcq1ZEEN0VFh6qiefunom8PTEg32LC9+QIO7RYg2TkbW+p837HDCBSpaZnwJDIyVcqMWgaWyFM6ZvEXtSf2vSlkkzeMR4DdpjAwJpJ8H69Z+JZKRS5JkBt5AuU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=185.176.79.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.18.186.31]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4cRggh0DStz6L5G3; Wed, 17 Sep 2025 22:12:00 +0800 (CST) Received: from frapeml500008.china.huawei.com (unknown [7.182.85.71]) by mail.maildlp.com (Postfix) with ESMTPS id 886871400D4; Wed, 17 Sep 2025 22:16:32 +0800 (CST) Received: from SecurePC-101-06.huawei.com (10.122.19.247) by frapeml500008.china.huawei.com (7.182.85.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Wed, 17 Sep 2025 16:16:32 +0200 From: Jonathan Cameron To: Michael Tsirkin , , CC: , Fan Ni , , , Ravi Shankar Subject: [PATCH qemu for 10.2 5/5] hw/cxl/events: Updates for rev3.2 memory module event record Date: Wed, 17 Sep 2025 15:13:55 +0100 Message-ID: <20250917141355.293217-6-Jonathan.Cameron@huawei.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250917141355.293217-1-Jonathan.Cameron@huawei.com> References: <20250917141355.293217-1-Jonathan.Cameron@huawei.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: lhrpeml100003.china.huawei.com (7.191.160.210) To frapeml500008.china.huawei.com (7.182.85.71) From: Shiju Jose CXL spec rev3.2 section 8.2.10.2.1.3 Table 8-50, memory module event record has updated with following new fields. 1. Validity Flags 2. Component Identifier 3. Device Event Sub-Type Add updates for the above spec changes in the CXL memory module event reporting and QMP command to inject memory module event. Signed-off-by: Shiju Jose Signed-off-by: Jonathan Cameron --- qapi/cxl.json | 12 +++++++++++- include/hw/cxl/cxl_events.h | 7 +++++-- hw/mem/cxl_type3.c | 20 ++++++++++++++++++++ hw/mem/cxl_type3_stubs.c | 4 ++++ 4 files changed, 40 insertions(+), 3 deletions(-) diff --git a/qapi/cxl.json b/qapi/cxl.json index fc22e26ecb..b8165b0e32 100644 --- a/qapi/cxl.json +++ b/qapi/cxl.json @@ -242,6 +242,14 @@ # @corrected-persistent-error-count: Total number of correctable # errors in persistent memory # +# @component-id: Device specific component identifier for the event. +# May describe a field replaceable sub-component of the device. +# +# @is-comp-id-pldm: This flag specifies whether the device-specific +# component identifier format follows PLDM. +# +# @sub-type: Device event sub-type. +# # Since: 8.1 ## { 'struct': 'CXLMemModuleEvent', @@ -251,7 +259,9 @@ 'life-used': 'uint8', 'temperature' : 'int16', 'dirty-shutdown-count': 'uint32', 'corrected-volatile-error-count': 'uint32', - 'corrected-persistent-error-count': 'uint32' + 'corrected-persistent-error-count': 'uint32', + '*component-id': 'str', '*is-comp-id-pldm':'bool', + 'sub-type':'uint8' }} ## diff --git a/include/hw/cxl/cxl_events.h b/include/hw/cxl/cxl_events.h index a3c5f2ec20..4a7836ad72 100644 --- a/include/hw/cxl/cxl_events.h +++ b/include/hw/cxl/cxl_events.h @@ -166,7 +166,7 @@ typedef struct CXLEventDram { /* * Memory Module Event Record - * CXL r3.1 Section 8.2.9.2.1.3: Table 8-47 + * CXL r3.2 Section 8.2.10.2.1.3: Table 8-59 * All fields little endian. */ typedef struct CXLEventMemoryModule { @@ -180,7 +180,10 @@ typedef struct CXLEventMemoryModule { uint32_t dirty_shutdown_count; uint32_t corrected_volatile_error_count; uint32_t corrected_persistent_error_count; - uint8_t reserved[0x3d]; + uint16_t validity_flags; + uint8_t component_id[CXL_EVENT_GEN_MED_COMP_ID_SIZE]; + uint8_t sub_type; + uint8_t reserved[0x2a]; } QEMU_PACKED CXLEventMemoryModule; /* diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 96c78b7222..14efaef9ad 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -1937,6 +1937,9 @@ void qmp_cxl_inject_dram_event(const char *path, CxlEventLog log, } } +#define CXL_MMER_VALID_COMPONENT BIT(0) +#define CXL_MMER_VALID_COMPONENT_ID_FORMAT BIT(1) + void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log, uint32_t flags, bool has_maint_op_class, uint8_t maint_op_class, @@ -1953,11 +1956,16 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log, uint32_t dirty_shutdown_count, uint32_t corrected_volatile_error_count, uint32_t corrected_persist_error_count, + const char *component_id, + bool has_comp_id_pldm, + bool is_comp_id_pldm, + uint8_t sub_type, Error **errp) { Object *obj = object_resolve_path(path, NULL); CXLEventMemoryModule module; CXLEventRecordHdr *hdr = &module.hdr; + uint16_t valid_flags = 0; CXLDeviceState *cxlds; CXLType3Dev *ct3d; uint8_t enc_log; @@ -2000,6 +2008,18 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log, stl_le_p(&module.corrected_persistent_error_count, corrected_persist_error_count); + if (component_id) { + strncpy((char *)module.component_id, component_id, + sizeof(module.component_id) - 1); + valid_flags |= CXL_MMER_VALID_COMPONENT; + if (has_comp_id_pldm && is_comp_id_pldm) { + valid_flags |= CXL_MMER_VALID_COMPONENT_ID_FORMAT; + } + } + module.sub_type = sub_type; + + stw_le_p(&module.validity_flags, valid_flags); + if (cxl_event_insert(cxlds, enc_log, (CXLEventRecordRaw *)&module)) { cxl_event_irq_assert(ct3d); } diff --git a/hw/mem/cxl_type3_stubs.c b/hw/mem/cxl_type3_stubs.c index 231dda263f..98292a931c 100644 --- a/hw/mem/cxl_type3_stubs.c +++ b/hw/mem/cxl_type3_stubs.c @@ -78,6 +78,10 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log, uint32_t dirty_shutdown_count, uint32_t corrected_volatile_error_count, uint32_t corrected_persist_error_count, + const char *component_id, + bool has_comp_id_pldm, + bool is_comp_id_pldm, + uint8_t sub_type, Error **errp) {} void qmp_cxl_inject_poison(const char *path, uint64_t start, uint64_t length, -- 2.48.1