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From: Vishal Aslot <vaslot@nvidia.com>
To: Davidlohr Bueso <dave@stgolabs.net>,
	Jonathan Cameron <jonathan.cameron@huawei.com>,
	Dave Jiang <dave.jiang@intel.com>,
	"Alison Schofield" <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	Ira Weiny <ira.weiny@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Li Ming <ming.li@zohomail.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Vishal Aslot <vaslot@nvidia.com>,
	"open list:COMPUTE EXPRESS LINK (CXL)"
	<linux-cxl@vger.kernel.org>,
	open list <linux-kernel@vger.kernel.org>
Subject: [PATCH v1 1/2] cxl_test: enable zero sized decoders under hb0
Date: Tue, 14 Oct 2025 19:40:05 -0700	[thread overview]
Message-ID: <20251015024019.1189713-2-vaslot@nvidia.com> (raw)
In-Reply-To: <20251015024019.1189713-1-vaslot@nvidia.com>

The cxl core in linux updated to supported committed
decoders of zero size, because this is allowed by
the CXL spec.

This patch updates cxl_test to enable decoders 1 and 2
in the host-bridge 0 port, in a switch uport under hb0,
and the endpoints ports with size zero simulating
committed zero sized decoders.

Signed-off-by: Vishal Aslot <vaslot@nvidia.com>
---
 tools/testing/cxl/test/cxl.c | 96 +++++++++++++++++++++++++++++++++++-
 1 file changed, 94 insertions(+), 2 deletions(-)

diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
index 2d135ca533d0..cb18ee41a7cf 100644
--- a/tools/testing/cxl/test/cxl.c
+++ b/tools/testing/cxl/test/cxl.c
@@ -719,6 +719,45 @@ static void default_mock_decoder(struct cxl_decoder *cxld)
 	cxld->reset = mock_decoder_reset;
 }
 
+static void size_zero_mock_decoder_ep(struct cxl_decoder *cxld, u64 base)
+{
+	struct cxl_endpoint_decoder *cxled;
+
+	cxled = to_cxl_endpoint_decoder(&cxld->dev);
+	cxld->hpa_range = (struct range){
+		.start = base,
+		.end = base - 1,  /* Size 0 */
+	};
+
+	cxld->interleave_ways = 2;
+	cxld->interleave_granularity = 4096;
+	cxld->target_type = CXL_DECODER_HOSTONLYMEM;
+	cxld->flags = CXL_DECODER_F_ENABLE;
+	cxled->state = CXL_DECODER_STATE_AUTO;
+	cxld->commit = mock_decoder_commit;
+	cxld->reset = mock_decoder_reset;
+}
+
+static void size_zero_mock_decoder_sw(struct device *dev, u64 base, int i)
+{
+	struct cxl_switch_decoder *cxlsd;
+	struct cxl_decoder *cxld;
+
+	cxlsd = to_cxl_switch_decoder(dev);
+	cxld = &cxlsd->cxld;
+	cxld->flags = CXL_DECODER_F_ENABLE;
+	cxld->target_type = CXL_DECODER_HOSTONLYMEM;
+	if (i == 0)
+		cxld->interleave_ways = 2;
+	else
+		cxld->interleave_ways = 1;
+	cxld->interleave_granularity = 4096;
+	cxld->hpa_range = (struct range) {
+		.start = base,
+		.end = base - 1, /* Size 0 */
+	};
+}
+
 static int first_decoder(struct device *dev, const void *data)
 {
 	struct cxl_decoder *cxld;
@@ -731,6 +770,30 @@ static int first_decoder(struct device *dev, const void *data)
 	return 0;
 }
 
+static int second_decoder(struct device *dev, const void *data)
+{
+	struct cxl_decoder *cxld;
+
+	if (!is_switch_decoder(dev))
+		return 0;
+	cxld = to_cxl_decoder(dev);
+	if (cxld->id == 1)
+		return 1;
+	return 0;
+}
+
+static int third_decoder(struct device *dev, const void *data)
+{
+	struct cxl_decoder *cxld;
+
+	if (!is_switch_decoder(dev))
+		return 0;
+	cxld = to_cxl_decoder(dev);
+	if (cxld->id == 2)
+		return 1;
+	return 0;
+}
+
 static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
 {
 	struct acpi_cedt_cfmws *window = mock_cfmws[0];
@@ -743,7 +806,7 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
 	struct cxl_dport *dport;
 	struct device *dev;
 	bool hb0 = false;
-	u64 base;
+	u64 base = window->base_hpa;
 	int i;
 
 	if (is_endpoint_decoder(&cxld->dev)) {
@@ -767,6 +830,20 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
 		port = cxled_to_port(cxled);
 	}
 
+	/*
+	 * Decoders 1 and 2 of the endpoint under host bridge 0 should be enabled as zero-sized.
+	 * It would be even better to make sure that the parent switch uport decoder was
+	 * also enabled before enabling the size zero decoders but there is no harm in doing it
+	 * anyway.
+	 */
+	if (hb0 && (cxld->id == 1 || cxld->id == 2)) {
+		port = to_cxl_port(cxld->dev.parent);
+		size_zero_mock_decoder_ep(cxld, base);
+		/* Commit the zero-sized decoder */
+		port->commit_end = cxld->id;
+		return;
+	}
+
 	/*
 	 * The first decoder on the first 2 devices on the first switch
 	 * attached to host-bridge0 mock a fake / static RAM region. All
@@ -780,7 +857,6 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
 		return;
 	}
 
-	base = window->base_hpa;
 	cxld->hpa_range = (struct range) {
 		.start = base,
 		.end = base + size - 1,
@@ -844,6 +920,22 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)
 			.end = base + size - 1,
 		};
 		put_device(dev);
+
+		/* Enable the next two decoders also and make them zero sized */
+		dev = device_find_child(&iter->dev, NULL, second_decoder);
+		WARN_ON(!dev);
+		if (dev) {
+			size_zero_mock_decoder_sw(dev, base, i);
+			iter->commit_end = 1;
+			put_device(dev);
+		}
+		dev = device_find_child(&iter->dev, NULL, third_decoder);
+		WARN_ON(!dev);
+		if (dev) {
+			size_zero_mock_decoder_sw(dev, base, i);
+			iter->commit_end = 2;
+			put_device(dev);
+		}
 	}
 }
 
-- 
2.43.0


  reply	other threads:[~2025-10-15  2:41 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-15  2:40 [PATCH v1 0/2] Support zero-sized decoders Vishal Aslot
2025-10-15  2:40 ` Vishal Aslot [this message]
2025-10-15 15:38   ` [PATCH v1 1/2] cxl_test: enable zero sized decoders under hb0 Dave Jiang
2025-10-20  7:09   ` Alison Schofield
2025-10-20 14:19     ` Gregory Price
2025-10-20 19:30       ` Alison Schofield
2025-10-20 21:22         ` Dave Jiang
2025-10-21 14:03         ` Gregory Price
2026-02-11 15:04           ` Gregory Price
2026-02-11 15:59             ` Gregory Price
2025-10-15  2:40 ` [PATCH v1 2/2] cxl: Allow zero sized HDM decoders Vishal Aslot
2025-10-15 16:38   ` Dave Jiang
2025-10-20  6:46   ` Alison Schofield

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