Re: [RESEND v13 01/25] CXL/PCI: Move CXL DVSEC definitions into uapi/linux/pci_regs.h

Bowman, Terry
2025-12-08T22:13:16Z

On 12/8/2025 12:04 PM, Bjorn Helgaas wrote:
> On Tue, Nov 04, 2025 at 11:02:41AM -0600, Terry Bowman wrote:
>> The CXL DVSECs are currently defined in cxl/core/cxlpci.h. These are not
>> accessible to other subsystems. Move these to uapi/linux/pci_regs.h.
>>
>> Change DVSEC name formatting to follow the existing PCI format in
>> pci_regs.h. The current format uses CXL_DVSEC_XYZ and the CXL defines must
>> be changed to be PCI_DVSEC_CXL_XYZ to match existing pci_regs.h. Leave
>> PCI_DVSEC_CXL_PORT* defines as-is because they are already defined and may
>> be in use by userspace application(s).
>>
>> Update existing usage to match the name change.
>>
>> Update the inline documentation to refer to latest CXL spec version.
>
> Regrettably, r3.2 is no longer the latest ;)
>

Yes, I'll update.

>> +++ b/include/uapi/linux/pci_regs.h
>> @@ -1244,9 +1244,64 @@
>> /* Deprecated old name, replaced with PCI_DOE_DATA_OBJECT_DISC_RSP_3_TYPE */
>> #define PCI_DOE_DATA_OBJECT_DISC_RSP_3_PROTOCOL PCI_DOE_DATA_OBJECT_DISC_RSP_3_TYPE
>>
>> -/* Compute Express Link (CXL r3.1, sec 8.1.5) */
>> -#define PCI_DVSEC_CXL_PORT 3
>> -#define PCI_DVSEC_CXL_PORT_CTL 0x0c
>> -#define PCI_DVSEC_CXL_PORT_CTL_UNMASK_SBR 0x00000001
>> +/* Compute Express Link (CXL r3.2, sec 8.1)
>> + *
>> + * Note that CXL DVSEC id 3 and 7 to be ignored when the CXL link state
>> + * is "disconnected" (CXL r3.2, sec 9.12.3). Re-enumerate these
>> + * registers on downstream link-up events.
>> + */
>> +
>> +#define PCI_DVSEC_HEADER1_LENGTH_MASK __GENMASK(31, 20)
>
> I think PCI_DVSEC_HEADER1_LEN() could be used instead of adding a new
> definition.
>
>> +/* CXL 3.2 8.1.3: PCIe DVSEC for CXL Device */
>
> Can you use "CXL r4.0, sec 8.1.3" and similar so it refers to the most
> recent revision and matches the typical style for PCIe spec references?

Yes, I'll update all spec references to point at CXL r4.0 and specific section.

-Terry