Re: [PATCH v4 11/14] cxl/atl: Lock decoders that need address translation

Robert Richter
2025-11-11T12:53:53Z

On 04.11.25 10:13:34, Dave Jiang wrote:
>
>
> On 11/3/25 11:47 AM, Robert Richter wrote:
> > There is only support to translate addresses from an endpoint to its
> > CXL host bridge, but not in the opposite direction from the bridge to
> > the endpoint. Thus, the endpoint address range cannot be determined
> > and setup manually for a given SPA range of a region. If the endpoint
> > has address translation enabled, lock it to prevent the kernel from
> > reconfiguring it.
> >
> > Reviewed-by: Gregory Price <gourry@gourry.net>
> > Signed-off-by: Robert Richter <rrichter@amd.com>
> > ---
> > drivers/cxl/core/atl.c | 10 ++++++++++
> > 1 file changed, 10 insertions(+)
> >
> > diff --git a/drivers/cxl/core/atl.c b/drivers/cxl/core/atl.c
> > index d6aa7e6d0ac5..5c15e4d12193 100644
> > --- a/drivers/cxl/core/atl.c
> > +++ b/drivers/cxl/core/atl.c
> > @@ -158,6 +158,16 @@ static int cxl_prm_translate_hpa_range(struct cxl_root *cxl_root, void *data)
> > return -ENXIO;
> > }
> >
> > + /*
> > + * There is only support to translate from the endpoint to its
> > + * parent port, but not in the opposite direction from the
> > + * parent to the endpoint. Thus, the endpoint address range
> > + * cannot be determined and setup manually. If the address range
> > + * was translated and modified, forbid reprogramming of the
> > + * decoders and lock them.
> > + */
> > + cxld->flags |= CXL_DECODER_F_LOCK;
>

> Feels like this should be something the BIOS should enforce if that
> is the expectation? And the kernel checks and warns if that is not
> the case.

I think this is more a limitation of the kernel implementation rather
than the BIOS. The BIOS provides enought information by CFMWS, PRM,
HDM and PCI topology. In theory and if there is demand for it, support
could be added for driver region setup.

-Robert

>
> > +
> > ctx->hpa_range = hpa_range;
> > ctx->interleave_ways = ways;
> > ctx->interleave_granularity = gran;
>
?