From: Robert Richter <rrichter@amd.com>
To: Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Dave Jiang <dave.jiang@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>
Cc: <linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Gregory Price <gourry@gourry.net>,
"Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>,
Terry Bowman <terry.bowman@amd.com>,
Joshua Hahn <joshua.hahnjy@gmail.com>,
Robert Richter <rrichter@amd.com>
Subject: [PATCH 1/3] cxl: Simplify cxl_rd_ops allocation and handling
Date: Wed, 12 Nov 2025 21:51:02 +0100 [thread overview]
Message-ID: <20251112205105.1271726-2-rrichter@amd.com> (raw)
In-Reply-To: <20251112205105.1271726-1-rrichter@amd.com>
A root decoder's callback handlers are collected in struct cxl_rd_ops.
The structure is dynamically allocated, though it contains only a few
pointers in it. This also requires to check two pointes to check for
the existance of a callback.
Simplify the allocation, release and handler check by embedding the
ops statically in struct cxl_root_decoder.
Implementation is equivalent to how struct cxl_root_ops handles the
callbacks.
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Robert Richter <rrichter@amd.com>
---
drivers/cxl/acpi.c | 8 ++------
drivers/cxl/core/region.c | 20 +++++---------------
drivers/cxl/cxl.h | 2 +-
3 files changed, 8 insertions(+), 22 deletions(-)
diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
index d5119de7f5a9..fab736aa77dc 100644
--- a/drivers/cxl/acpi.c
+++ b/drivers/cxl/acpi.c
@@ -487,12 +487,8 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws,
cxlrd->qos_class = cfmws->qtg_id;
if (cfmws->interleave_arithmetic == ACPI_CEDT_CFMWS_ARITHMETIC_XOR) {
- cxlrd->ops = kzalloc(sizeof(*cxlrd->ops), GFP_KERNEL);
- if (!cxlrd->ops)
- return -ENOMEM;
-
- cxlrd->ops->hpa_to_spa = cxl_apply_xor_maps;
- cxlrd->ops->spa_to_hpa = cxl_apply_xor_maps;
+ cxlrd->ops.hpa_to_spa = cxl_apply_xor_maps;
+ cxlrd->ops.spa_to_hpa = cxl_apply_xor_maps;
}
rc = cxl_decoder_add(cxld);
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index 451e5492911c..2b5ae5d9a4b6 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -2958,16 +2958,6 @@ static bool cxl_is_hpa_in_chunk(u64 hpa, struct cxl_region *cxlr, int pos)
return false;
}
-static bool has_hpa_to_spa(struct cxl_root_decoder *cxlrd)
-{
- return cxlrd->ops && cxlrd->ops->hpa_to_spa;
-}
-
-static bool has_spa_to_hpa(struct cxl_root_decoder *cxlrd)
-{
- return cxlrd->ops && cxlrd->ops->spa_to_hpa;
-}
-
#define CXL_POS_ZERO 0
/**
* cxl_validate_translation_params
@@ -3141,8 +3131,8 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd,
hpa = hpa_offset + p->res->start + p->cache_size;
/* Root decoder translation overrides typical modulo decode */
- if (has_hpa_to_spa(cxlrd))
- hpa = cxlrd->ops->hpa_to_spa(cxlrd, hpa);
+ if (cxlrd->ops.hpa_to_spa)
+ hpa = cxlrd->ops.hpa_to_spa(cxlrd, hpa);
if (!cxl_resource_contains_addr(p->res, hpa)) {
dev_dbg(&cxlr->dev,
@@ -3151,7 +3141,7 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd,
}
/* Simple chunk check, by pos & gran, only applies to modulo decodes */
- if (!has_hpa_to_spa(cxlrd) && (!cxl_is_hpa_in_chunk(hpa, cxlr, pos)))
+ if (!cxlrd->ops.hpa_to_spa && !cxl_is_hpa_in_chunk(hpa, cxlr, pos))
return ULLONG_MAX;
return hpa;
@@ -3184,8 +3174,8 @@ static int region_offset_to_dpa_result(struct cxl_region *cxlr, u64 offset,
* If the root decoder has SPA to CXL HPA callback, use it. Otherwise
* CXL HPA is assumed to equal SPA.
*/
- if (has_spa_to_hpa(cxlrd)) {
- hpa = cxlrd->ops->spa_to_hpa(cxlrd, p->res->start + offset);
+ if (cxlrd->ops.spa_to_hpa) {
+ hpa = cxlrd->ops.spa_to_hpa(cxlrd, p->res->start + offset);
hpa_offset = hpa - p->res->start;
} else {
hpa_offset = offset;
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index 0481679eb109..91ff47382111 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -451,7 +451,7 @@ struct cxl_root_decoder {
void *platform_data;
struct mutex range_lock;
int qos_class;
- struct cxl_rd_ops *ops;
+ struct cxl_rd_ops ops;
struct cxl_switch_decoder cxlsd;
};
--
2.47.3
next prev parent reply other threads:[~2025-11-12 20:51 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-12 20:51 [PATCH 0/3] CXL updates for v6.19 Robert Richter
2025-11-12 20:51 ` Robert Richter [this message]
2025-11-12 22:35 ` [PATCH 1/3] cxl: Simplify cxl_rd_ops allocation and handling Gregory Price
2025-11-12 20:51 ` [PATCH 2/3] cxl/acpi: Group xor arithmetric setup code in a single block Robert Richter
2025-11-12 22:36 ` Gregory Price
2025-11-12 22:38 ` Gregory Price
2025-11-12 20:51 ` [PATCH 3/3] cxl/region: Remove local variable @inc in cxl_port_setup_targets() Robert Richter
2025-11-12 22:40 ` Gregory Price
2025-11-12 21:45 ` [PATCH 0/3] CXL updates for v6.19 Dave Jiang
2025-11-13 11:01 ` Robert Richter
2025-11-13 15:20 ` Dave Jiang
2025-11-13 15:32 ` Gregory Price
2025-11-13 16:34 ` Dave Jiang
2025-11-13 16:45 ` Robert Richter
2025-11-13 20:10 ` Dave Jiang
2025-11-13 20:36 ` Robert Richter
2025-11-14 9:09 ` Robert Richter
2025-11-14 15:32 ` Dave Jiang
2025-11-14 16:21 ` Robert Richter
2025-11-14 16:28 ` Dave Jiang
2025-11-14 18:18 ` Dave Jiang
2025-11-14 18:25 ` Robert Richter
2025-11-14 18:35 ` Dave Jiang
2025-11-14 20:19 ` Dave Jiang
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