From: Robert Richter <rrichter@amd.com>
To: Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Dave Jiang <dave.jiang@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>
Cc: <linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Gregory Price <gourry@gourry.net>,
"Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>,
Terry Bowman <terry.bowman@amd.com>,
Joshua Hahn <joshua.hahnjy@gmail.com>,
Robert Richter <rrichter@amd.com>
Subject: [PATCH v7 01/11] cxl/region: Rename misleading variable name @hpa to @hpa_range
Date: Fri, 14 Nov 2025 22:39:14 +0100 [thread overview]
Message-ID: <20251114213931.30754-2-rrichter@amd.com> (raw)
In-Reply-To: <20251114213931.30754-1-rrichter@amd.com>
@hpa is actually a @hpa_range, rename variables accordingly.
Reviewed-by: Gregory Price <gourry@gourry.net>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Robert Richter <rrichter@amd.com>
---
drivers/cxl/core/region.c | 28 +++++++++++++++-------------
1 file changed, 15 insertions(+), 13 deletions(-)
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index 8cdb6a935289..e108819593e9 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -3345,9 +3345,9 @@ static int match_decoder_by_range(struct device *dev, const void *data)
}
static struct cxl_decoder *
-cxl_port_find_switch_decoder(struct cxl_port *port, struct range *hpa)
+cxl_port_find_switch_decoder(struct cxl_port *port, struct range *hpa_range)
{
- struct device *cxld_dev = device_find_child(&port->dev, hpa,
+ struct device *cxld_dev = device_find_child(&port->dev, hpa_range,
match_decoder_by_range);
return cxld_dev ? to_cxl_decoder(cxld_dev) : NULL;
@@ -3360,14 +3360,14 @@ cxl_find_root_decoder(struct cxl_endpoint_decoder *cxled)
struct cxl_port *port = cxled_to_port(cxled);
struct cxl_root *cxl_root __free(put_cxl_root) = find_cxl_root(port);
struct cxl_decoder *root, *cxld = &cxled->cxld;
- struct range *hpa = &cxld->hpa_range;
+ struct range *hpa_range = &cxld->hpa_range;
- root = cxl_port_find_switch_decoder(&cxl_root->port, hpa);
+ root = cxl_port_find_switch_decoder(&cxl_root->port, hpa_range);
if (!root) {
dev_err(cxlmd->dev.parent,
"%s:%s no CXL window for range %#llx:%#llx\n",
dev_name(&cxlmd->dev), dev_name(&cxld->dev),
- cxld->hpa_range.start, cxld->hpa_range.end);
+ hpa_range->start, hpa_range->end);
return NULL;
}
@@ -3433,7 +3433,7 @@ static int __construct_region(struct cxl_region *cxlr,
struct cxl_endpoint_decoder *cxled)
{
struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
- struct range *hpa = &cxled->cxld.hpa_range;
+ struct range *hpa_range = &cxled->cxld.hpa_range;
struct cxl_region_params *p;
struct resource *res;
int rc;
@@ -3454,7 +3454,7 @@ static int __construct_region(struct cxl_region *cxlr,
if (!res)
return -ENOMEM;
- *res = DEFINE_RES_MEM_NAMED(hpa->start, range_len(hpa),
+ *res = DEFINE_RES_MEM_NAMED(hpa_range->start, range_len(hpa_range),
dev_name(&cxlr->dev));
rc = cxl_extended_linear_cache_resize(cxlr, res);
@@ -3533,11 +3533,12 @@ static struct cxl_region *construct_region(struct cxl_root_decoder *cxlrd,
}
static struct cxl_region *
-cxl_find_region_by_range(struct cxl_root_decoder *cxlrd, struct range *hpa)
+cxl_find_region_by_range(struct cxl_root_decoder *cxlrd,
+ struct range *hpa_range)
{
struct device *region_dev;
- region_dev = device_find_child(&cxlrd->cxlsd.cxld.dev, hpa,
+ region_dev = device_find_child(&cxlrd->cxlsd.cxld.dev, hpa_range,
match_region_by_range);
if (!region_dev)
return NULL;
@@ -3547,7 +3548,7 @@ cxl_find_region_by_range(struct cxl_root_decoder *cxlrd, struct range *hpa)
int cxl_add_to_region(struct cxl_endpoint_decoder *cxled)
{
- struct range *hpa = &cxled->cxld.hpa_range;
+ struct range *hpa_range = &cxled->cxld.hpa_range;
struct cxl_region_params *p;
bool attach = false;
int rc;
@@ -3558,12 +3559,13 @@ int cxl_add_to_region(struct cxl_endpoint_decoder *cxled)
return -ENXIO;
/*
- * Ensure that if multiple threads race to construct_region() for @hpa
- * one does the construction and the others add to that.
+ * Ensure that, if multiple threads race to construct_region()
+ * for the HPA range, one does the construction and the others
+ * add to that.
*/
mutex_lock(&cxlrd->range_lock);
struct cxl_region *cxlr __free(put_cxl_region) =
- cxl_find_region_by_range(cxlrd, hpa);
+ cxl_find_region_by_range(cxlrd, hpa_range);
if (!cxlr)
cxlr = construct_region(cxlrd, cxled);
mutex_unlock(&cxlrd->range_lock);
--
2.47.3
next prev parent reply other threads:[~2025-11-14 21:39 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-14 21:39 [PATCH v7 00/11] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement Robert Richter
2025-11-14 21:39 ` Robert Richter [this message]
2025-11-14 21:39 ` [PATCH v7 02/11] cxl/region: Store root decoder in struct cxl_region Robert Richter
2025-11-14 21:39 ` [PATCH v7 03/11] cxl/region: Store HPA range " Robert Richter
2025-11-14 21:39 ` [PATCH v7 04/11] cxl: Simplify cxl_root_ops allocation and handling Robert Richter
2025-11-14 21:39 ` [PATCH v7 05/11] cxl/region: Separate region parameter setup and region construction Robert Richter
2025-11-14 21:39 ` [PATCH v7 06/11] cxl/region: Add @hpa_range argument to function cxl_calc_interleave_pos() Robert Richter
2025-11-17 13:57 ` Jonathan Cameron
2025-11-14 21:39 ` [PATCH v7 07/11] cxl/region: Use region data to get the root decoder Robert Richter
2025-11-14 21:39 ` [PATCH v7 08/11] cxl: Introduce callback for HPA address ranges translation Robert Richter
2025-11-14 21:39 ` [PATCH v7 09/11] cxl/acpi: Prepare use of EFI runtime services Robert Richter
2025-11-14 21:39 ` [PATCH v7 10/11] cxl: Enable AMD Zen5 address translation using ACPI PRMT Robert Richter
2025-11-14 21:39 ` [PATCH v7 11/11] cxl/atl: Lock decoders that need address translation Robert Richter
2025-11-14 22:05 ` Dave Jiang
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