Re: [PATCH v4 0/10] CXL Reset support for Type 2 devices

[Bjorn Helgaas <helgaas@kernel.org>]

On Tue, Jan 20, 2026 at 10:26:00PM +0000, smadhavan@nvidia.com wrote:
> ...

>   [PATCH v4 1/10] cxl: move DVSEC defines to cxl pci header
>   [PATCH v4 2/10] PCI: switch CXL port DVSEC defines
>   [PATCH v4 3/10] cxl: add type 2 helper and reset DVSEC bits
>   [PATCH v4 4/10] PCI: add CXL reset method
>   [PATCH v4 5/10] cxl: add reset prepare and region teardown
>   [PATCH v4 6/10] PCI: wire CXL reset prepare/cleanup
>   [PATCH v4 7/10] cxl: add host cache flush and multi-function reset
>   [PATCH v4 8/10] cxl: add DVSEC config save/restore
>   [PATCH v4 9/10] PCI: save/restore CXL config around reset
>   [PATCH v4 10/10] cxl: add HDM decoder and IDE save/restore

Please run "git log --online" on the files you change and match the
style of subject lines.  In drivers/pci/, the subject lines start with
capital letters, e.g.,

  PCI: Switch CXL port ...
  PCI: Add CXL reset method (but please include the function name)
  ...