From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <dave@stgolabs.net>,
<alison.schofield@intel.com>, <dave.jiang@intel.com>,
<terry.bowman@amd.com>
Subject: Re: [PATCH v2 3/9] cxl/port: Cleanup dport removal with a devres group
Date: Mon, 2 Feb 2026 14:27:16 +0000 [thread overview]
Message-ID: <20260202142716.00002d3b@huawei.com> (raw)
In-Reply-To: <20260131000403.2135324-4-dan.j.williams@intel.com>
On Fri, 30 Jan 2026 16:03:57 -0800
Dan Williams <dan.j.williams@intel.com> wrote:
> In preparation for adding more setup actions like RAS register mapping,
> introduce a devres group to collect all the dport creation / registration
> actions. This replaces the maintenance tedium of open coding several
> devm_release_action() calls in del_dport().
>
> Tested-by: Terry Bowman <terry.bowman@amd.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
I think this is on the right side of the 'too clever' boundary
as it is reasonably easy to follow so
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
next prev parent reply other threads:[~2026-02-02 14:27 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-31 0:03 [PATCH v2 0/9] cxl/port: Unify RAS setup across port types Dan Williams
2026-01-31 0:03 ` [PATCH v2 1/9] cxl/port: Cleanup handling of the nr_dports 0 -> 1 transition Dan Williams
2026-01-31 0:03 ` [PATCH v2 2/9] cxl/port: Reduce number of @dport variables in cxl_port_add_dport() Dan Williams
2026-01-31 0:03 ` [PATCH v2 3/9] cxl/port: Cleanup dport removal with a devres group Dan Williams
2026-02-02 14:27 ` Jonathan Cameron [this message]
2026-01-31 0:03 ` [PATCH v2 4/9] cxl/port: Move decoder setup before dport creation Dan Williams
2026-01-31 0:03 ` [PATCH v2 5/9] cxl/port: Move dport probe operations to a driver event Dan Williams
2026-01-31 0:04 ` [PATCH v2 6/9] cxl/port: Move dport RAS setup to dport add time Dan Williams
2026-01-31 0:04 ` [PATCH v2 7/9] cxl/port: Map Port RAS registers Dan Williams
2026-01-31 0:04 ` [PATCH v2 8/9] cxl/port: Move endpoint component register management to cxl_port Dan Williams
2026-01-31 0:04 ` [PATCH v2 9/9] cxl/port: Unify endpoint and switch port lookup Dan Williams
2026-02-01 21:45 ` [PATCH v2 0/9] cxl/port: Unify RAS setup across port types Bowman, Terry
2026-02-02 20:01 ` Dave Jiang
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