Re: [PATCH v2] Documentation: Update the CXL Maturity Map

Dave Jiang
2025-05-13T22:21:58Z

On 5/12/25 2:42 PM, alison.schofield@intel.com wrote:
> From: Alison Schofield <alison.schofield@intel.com>
>
> Changes for extended-linear cache, hetero-interleave, and HPA->DPA
> address translation.
>
> Signed-off-by: Alison Schofield <alison.schofield@intel.com>

Applied to cxl/next

> ---
> Change in v2:
> - Make ELC a '2' (DaveJ)
>
> Documentation/driver-api/cxl/maturity-map.rst | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/driver-api/cxl/maturity-map.rst b/Documentation/driver-api/cxl/maturity-map.rst
> index a2288f9df658..1330f3f52129 100644
> --- a/Documentation/driver-api/cxl/maturity-map.rst
> +++ b/Documentation/driver-api/cxl/maturity-map.rst
> @@ -51,9 +51,9 @@ in place, but there are several corner cases that are pending closure.
>
> * [2] CXL Window Enumeration
>
> - * [0] :ref:`Extended-linear memory-side cache <extended-linear>`
> + * [2] :ref:`Extended-linear memory-side cache <extended-linear>`
> * [0] Low Memory-hole
> - * [0] Hetero-interleave
> + * [X] Hetero-interleave
>
> * [2] Switch Enumeration
>
> @@ -173,7 +173,7 @@ Accelerator
> User Flow Support
> -----------------
>
> -* [0] HPA->DPA Address translation (need xormaps export solution)
> +* [0] Inject & clear poison by HPA
>
> Details
> =======