From: Dave Jiang <dave.jiang@intel.com>
To: linux-cxl@vger.kernel.org
Cc: dave@stgolabs.net, jic23@kernel.org, alison.schofield@intel.com,
vishal.l.verma@intel.com, ira.weiny@intel.com, djbw@kernel.org
Subject: [PATCH 5/7] cxl/test: Fixup hdm init for auto region to support type2
Date: Wed, 22 Apr 2026 16:02:35 -0700 [thread overview]
Message-ID: <20260422230237.2599333-6-dave.jiang@intel.com> (raw)
In-Reply-To: <20260422230237.2599333-1-dave.jiang@intel.com>
Add support to setup initialization of decoders in order to support
type2 auto region.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
tools/testing/cxl/test/cxl.c | 71 +++++++++++++++++++++++++++++++++++-
1 file changed, 70 insertions(+), 1 deletion(-)
diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
index 59a265ad23e0..8e489d22ab5e 100644
--- a/tools/testing/cxl/test/cxl.c
+++ b/tools/testing/cxl/test/cxl.c
@@ -1079,6 +1079,7 @@ enum cxld_init_type {
MOCK_DECODER_INIT_DEFAULT,
MOCK_DECODER_INIT_SAVED,
MOCK_DECODER_INIT_TYPE3_AUTO,
+ MOCK_DECODER_INIT_TYPE2_AUTO,
};
static enum cxld_init_type get_decoder_init_type(struct cxl_decoder *cxld,
@@ -1107,7 +1108,8 @@ static enum cxld_init_type get_decoder_init_type(struct cxl_decoder *cxld,
pdev->id > 4 || cxld->id > 0)
return MOCK_DECODER_INIT_DEFAULT;
- return MOCK_DECODER_INIT_TYPE3_AUTO;
+ return type2_test ? MOCK_DECODER_INIT_TYPE2_AUTO :
+ MOCK_DECODER_INIT_TYPE3_AUTO;
}
static bool mock_decoder_handle_saved(struct cxl_decoder *cxld, struct cxl_test_decoder *td)
@@ -1126,6 +1128,70 @@ static bool mock_decoder_handle_saved(struct cxl_decoder *cxld, struct cxl_test_
return false;
}
+static void mock_init_hdm_type2_cxled(struct cxl_endpoint_decoder *cxled,
+ struct cxl_port *port,
+ struct platform_device *pdev)
+{
+ struct acpi_cedt_cfmws *window = mock_cfmws[0];
+ struct cxl_decoder *cxld = &cxled->cxld;
+ struct cxl_switch_decoder *cxlsd;
+ struct cxl_dport *dport;
+ struct cxl_port *root_port;
+ struct device *dev;
+ u64 base;
+
+ base = window->base_hpa;
+ cxld->hpa_range = (struct range) {
+ .start = base,
+ .end = base + mock_auto_region_size - 1,
+ };
+
+ cxld->interleave_ways = 1;
+ eig_to_granularity(window->granularity, &cxld->interleave_granularity);
+ cxld->target_type = CXL_DECODER_DEVMEM;
+ cxld->flags = CXL_DECODER_F_ENABLE;
+ cxled->state = CXL_DECODER_STATE_AUTO;
+ port->commit_end = cxld->id;
+ devm_cxl_dpa_reserve(cxled, 0,
+ mock_auto_region_size / cxld->interleave_ways, 0);
+ cxld->commit = mock_decoder_commit;
+ cxld->reset = mock_decoder_reset;
+
+ WARN_ON_ONCE(!cxld_registry_new(cxld));
+ /*
+ * Now that endpoint decoder is set up, walk up the hierarchy
+ * and setup the root port decoder targeting @cxlmd.
+ */
+ dport = port->parent_dport;
+ root_port = dport->port;
+ dev = device_find_child(&root_port->dev, NULL, first_decoder);
+ /*
+ * Ancestor ports are guaranteed to be enumerated before
+ * @port, and all ports have at least one decoder.
+ */
+ if (WARN_ON(!dev))
+ return;
+
+ cxlsd = to_cxl_switch_decoder(dev);
+ cxlsd->target[0] = dport;
+ cxlsd->cxld.target_map[0] = dport->port_id;
+ cxld = &cxlsd->cxld;
+ cxld->target_type = CXL_DECODER_DEVMEM;
+ cxld->flags = CXL_DECODER_F_ENABLE;
+ root_port->commit_end = 0;
+ cxld->interleave_ways = 1;
+ cxld->interleave_granularity = 4096;
+ cxld->hpa_range = (struct range) {
+ .start = base,
+ .end = base + mock_auto_region_size - 1,
+ };
+ cxld->commit = mock_decoder_commit;
+ cxld->reset = mock_decoder_reset;
+
+ cxld_registry_update(cxld);
+ put_device(dev);
+}
+
static void mock_init_hdm_type3_cxled(struct cxl_endpoint_decoder *cxled,
struct cxl_port *port,
struct platform_device *pdev)
@@ -1276,6 +1342,9 @@ static bool mock_init_hdm_decoder(struct cxl_decoder *cxld)
case MOCK_DECODER_INIT_TYPE3_AUTO:
mock_init_hdm_type3_cxled(cxled, port, pdev);
return false;
+ case MOCK_DECODER_INIT_TYPE2_AUTO:
+ mock_init_hdm_type2_cxled(cxled, port, pdev);
+ return false;
default:
return false;
}
--
2.53.0
next prev parent reply other threads:[~2026-04-22 23:02 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-22 23:02 [PATCH 0/7] cxl: Add CXL type2 accelerator support for cxl_test Dave Jiang
2026-04-22 23:02 ` [PATCH 1/7] cxl/test: Refactor mock_init_hdm_decoder() to prep for type2 decoder Dave Jiang
2026-04-22 23:02 ` [PATCH 2/7] cxl/test: Add type2 support for mock CFMWS0 Dave Jiang
2026-04-22 23:02 ` [PATCH 3/7] cxl/test: Refactor platform device enumerations Dave Jiang
2026-04-22 23:02 ` [PATCH 4/7] cxl/test: Add hierarchy enumeration support for type2 device Dave Jiang
2026-04-22 23:02 ` Dave Jiang [this message]
2026-04-22 23:02 ` [PATCH 6/7] cxl/test: Add cxl_test accelerator driver Dave Jiang
2026-04-22 23:02 ` [PATCH 7/7] cxl: Fix double unregistration of CXL regions for type2 devices Dave Jiang
2026-04-23 7:10 ` Alejandro Lucero Palau
2026-04-23 14:36 ` Dave Jiang
2026-04-29 23:45 ` Dan Williams (nvidia)
2026-04-23 7:16 ` [PATCH 0/7] cxl: Add CXL type2 accelerator support for cxl_test Alejandro Lucero Palau
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