[PATCH v2 0/2] cxl/pci: Fix the incorrect check of pci_config_read/write*() returns

[Dave Jiang <dave.jiang@intel.com>]

v2:
- Fixed up additional bits (Alison)
- Fix up fixes tag (Alison)

The patches are inspired by comments from Richard Cheng WRT pci config
accessors return PCIBIOS errors that are positive integers rather than
negative errnos. I went and audited the cxl PCI code and found a few
locations that need to be fixed. There are other locations that may
trigger issues, but at this point we'll fix them as they happen.


Dave Jiang (2):
  cxl/pci: Fix the incorrect check of pci_read_config_word() return
  cxl/pci: Convert PCIBIOS errors to errno on DVSEC config accesses

 drivers/cxl/core/pci.c | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)


base-commit: e43ffb69e0438cddd72aaa30898b4dc446f664f8
-- 
2.54.0