From: Richard Cheng <icheng@nvidia.com>
To: dave@stgolabs.net, jonathan.cameron@huawei.com,
dave.jiang@intel.com, alison.schofield@intel.com,
vishal.l.verma@intel.com, ira.weiny@intel.com,
dan.j.williams@intel.com
Cc: linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
newtonl@nvidia.com, kristinc@nvidia.com, kaihengf@nvidia.com,
kobak@nvidia.com, vaslot@nvidia.com, smadhavan@nvidia.com,
Richard Cheng <icheng@nvidia.com>
Subject: [PATCH v3 2/2] tools/testing/cxl: Enable zero sized decoder under hb0
Date: Sun, 7 Jun 2026 13:38:37 +0800 [thread overview]
Message-ID: <20260607053837.4389-3-icheng@nvidia.com> (raw)
In-Reply-To: <20260607053837.4389-1-icheng@nvidia.com>
The kernel now allows committed HDM decoders of zero size so BIOS can
burn slots with LOCK, cxl_test needs to exercise the patch.
Add a mock_zero_size_decoders module param, When set, the special
endpoint under host-bridge0 (cxl_mem.0 and cxl_mem.4) commit decoders 1
and 2 as zero-size + locked above the decoder[0] auto-region, mirrored
on the parent switch and host bridge. commit_end then lands on a decoder
with no DPA resource, exercising the new enumeration and
poison-by-endpoint paths.
Signed-off-by: Vishal Aslot <vaslot@nvidia.com>
Signed-off-by: Richard Cheng <icheng@nvidia.com>
---
v2->v3:
- Gate the zero-size + locked decoder injection behind a new
mock_zero_size_decoders module parameter (default off). v2 applied
it unconditionally on the host-bridge0 auto-region endpoints, which
the region test suite reuses, regressing 7 of 17 cxl unit tests;
defaulting off leaves the shared topology untouched.
v1->v2:
- Replace second_decoder(), third_decoder() with a single
match_decoder_by_index() helper, so all lookups share one matcher.
- Use DEFINE_RANGE() for the empty range instead of an open-coded
struct.
- Set cxled->state = CXL_DECODER_STATE_MANUAL rather than STATE_AUTO.
- Set CXL_DECODER_F_LOCK on the mock zero-size decoders to model the
BIOS-burns-slots case.
---
tools/testing/cxl/test/cxl.c | 83 +++++++++++++++++++++++++++++++++---
1 file changed, 77 insertions(+), 6 deletions(-)
diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
index 296516eecfd6..190cb18d6932 100644
--- a/tools/testing/cxl/test/cxl.c
+++ b/tools/testing/cxl/test/cxl.c
@@ -17,6 +17,7 @@
static int interleave_arithmetic;
static bool extended_linear_cache;
static bool fail_autoassemble;
+static bool mock_zero_size_decoders;
#define FAKE_QTG_ID 42
@@ -1041,16 +1042,47 @@ static void default_mock_decoder(struct cxl_decoder *cxld)
WARN_ON_ONCE(!cxld_registry_new(cxld));
}
-static int first_decoder(struct device *dev, const void *data)
+static int match_decoder_by_index(struct device *dev, const void *data)
{
+ int target_id = *(const int *)data;
struct cxl_decoder *cxld;
if (!is_switch_decoder(dev))
return 0;
cxld = to_cxl_decoder(dev);
- if (cxld->id == 0)
- return 1;
- return 0;
+ return cxld->id == target_id;
+}
+
+/*
+ * Mock a BIOS-burnt slot: a committed, locked, zero-size decoder
+ * (CXL r3.2 8.2.4.20.12). Gated by the mock_zero_size_decoders module
+ * param so the default cxl_test topology, shared by the region test
+ * suite, is left undisturbed.
+ */
+static void size_zero_mock_decoder_ep(struct cxl_decoder *cxld, u64 base)
+{
+ struct cxl_endpoint_decoder *cxled = to_cxl_endpoint_decoder(&cxld->dev);
+
+ cxld->hpa_range = DEFINE_RANGE(base, base - 1);
+ cxld->interleave_ways = 2;
+ cxld->interleave_granularity = 4096;
+ cxld->target_type = CXL_DECODER_HOSTONLYMEM;
+ cxld->flags = CXL_DECODER_F_ENABLE | CXL_DECODER_F_LOCK;
+ cxled->state = CXL_DECODER_STATE_MANUAL;
+ cxld->commit = mock_decoder_commit;
+ cxld->reset = mock_decoder_reset;
+}
+
+static void size_zero_mock_decoder_sw(struct cxl_decoder *cxld, u64 base,
+ int level)
+{
+ cxld->flags = CXL_DECODER_F_ENABLE | CXL_DECODER_F_LOCK;
+ cxld->target_type = CXL_DECODER_HOSTONLYMEM;
+ cxld->interleave_ways = level == 0 ? 2 : 1;
+ cxld->interleave_granularity = 4096;
+ cxld->hpa_range = DEFINE_RANGE(base, base - 1);
+ cxld->commit = mock_decoder_commit;
+ cxld->reset = mock_decoder_reset;
}
/*
@@ -1131,7 +1163,7 @@ static bool mock_init_hdm_decoder(struct cxl_decoder *cxld)
* See 'cxl list -BMPu -m cxl_mem.0,cxl_mem.4'
*/
if (!is_endpoint_decoder(&cxld->dev) || !hb0 || pdev->id % 4 ||
- pdev->id > 4 || cxld->id > 0) {
+ pdev->id > 4 || cxld->id > (mock_zero_size_decoders ? 2 : 0)) {
default_mock_decoder(cxld);
return false;
}
@@ -1145,6 +1177,20 @@ static bool mock_init_hdm_decoder(struct cxl_decoder *cxld)
base = window->base_hpa;
if (extended_linear_cache)
base += mock_auto_region_size;
+
+ /*
+ * With mock_zero_size_decoders, decoders 1 and 2 of the special
+ * endpoints mock BIOS-burnt zero-size + locked slots above the
+ * decoder[0] auto-region (CXL r3.2 8.2.4.20.12). commit_end then
+ * points at a decoder with no DPA resource, exercising the
+ * zero-size enumeration and poison-by-endpoint code paths.
+ */
+ if (cxld->id == 1 || cxld->id == 2) {
+ size_zero_mock_decoder_ep(cxld, base);
+ port->commit_end = cxld->id;
+ WARN_ON_ONCE(!cxld_registry_new(cxld));
+ return false;
+ }
cxld->hpa_range = (struct range) {
.start = base,
.end = base + mock_auto_region_size - 1,
@@ -1168,9 +1214,11 @@ static bool mock_init_hdm_decoder(struct cxl_decoder *cxld)
*/
iter = port;
for (i = 0; i < 2; i++) {
+ int id = 0;
+
dport = iter->parent_dport;
iter = dport->port;
- dev = device_find_child(&iter->dev, NULL, first_decoder);
+ dev = device_find_child(&iter->dev, &id, match_decoder_by_index);
/*
* Ancestor ports are guaranteed to be enumerated before
* @port, and all ports have at least one decoder.
@@ -1214,6 +1262,26 @@ static bool mock_init_hdm_decoder(struct cxl_decoder *cxld)
cxld_registry_update(cxld);
put_device(dev);
+
+ if (!mock_zero_size_decoders)
+ continue;
+
+ /*
+ * Mirror the endpoint: commit the next two switch decoders
+ * as zero-size + locked so the burnt-slot layout extends
+ * end-to-end through the switch and host bridge.
+ */
+ for (id = 1; id <= 2; id++) {
+ dev = device_find_child(&iter->dev, &id,
+ match_decoder_by_index);
+ if (WARN_ON(!dev))
+ continue;
+ cxld = to_cxl_decoder(dev);
+ size_zero_mock_decoder_sw(cxld, base, i);
+ iter->commit_end = id;
+ cxld_registry_update(cxld);
+ put_device(dev);
+ }
}
return false;
@@ -2030,6 +2098,9 @@ module_param(extended_linear_cache, bool, 0444);
MODULE_PARM_DESC(extended_linear_cache, "Enable extended linear cache support");
module_param(fail_autoassemble, bool, 0444);
MODULE_PARM_DESC(fail_autoassemble, "Simulate missing member of an auto-region");
+module_param(mock_zero_size_decoders, bool, 0444);
+MODULE_PARM_DESC(mock_zero_size_decoders,
+ "Mock BIOS-burnt committed zero-size locked decoders under host-bridge0");
module_init(cxl_test_init);
module_exit(cxl_test_exit);
MODULE_LICENSE("GPL v2");
--
2.43.0
prev parent reply other threads:[~2026-06-07 5:39 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-07 5:38 [PATCH v3 0/2] Support zero-sized HDM decoders Richard Cheng
2026-06-07 5:38 ` [PATCH v3 1/2] cxl/hdm: Allow zero sized " Richard Cheng
2026-06-07 5:51 ` sashiko-bot
2026-06-07 8:16 ` Richard Cheng
2026-06-07 5:38 ` Richard Cheng [this message]
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