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Date: Tue, 21 Jul 2026 00:53:12 +0100
From: Jonathan Cameron <jic23@kernel.org>
To: "Bowman, Terry" <terry.bowman@amd.com>
Cc: sashiko-reviews@lists.linux.dev, linux-cxl@vger.kernel.org,
 linux-pci@vger.kernel.org
Subject: Re: [PATCH v18 10/13] cxl: Add port and dport identifiers to CXL
 AER trace events
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In-Reply-To: <75709fbe-3825-45ea-9a98-884b31430eb6@amd.com>
References: <20260717222706.3540281-1-terry.bowman@amd.com>
	<20260717222706.3540281-11-terry.bowman@amd.com>
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On Mon, 20 Jul 2026 10:14:27 -0500
"Bowman, Terry" <terry.bowman@amd.com> wrote:

> On 7/17/2026 5:53 PM, sashiko-bot@kernel.org wrote:
> > Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
> > - [High] Asynchronous CPER error handling races with ACPI driver unbind, causing Use-After-Free of cxl_dport.  
> This is a false positive.
> 
> The Downstream port lifecycle is tied to the Port's xarray and synchronized here using the 
> Port's device lock.
> 
> > - [High] Live PCI configuration space reads on a potentially frozen or dead link during AER recovery.  
> This is fixed in patch 11 with introduction of cached PCI DSN.
Why not flip the patch order?