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From: sashiko-bot@kernel.org
To: "Dave Jiang" <dave.jiang@intel.com>
Cc: linux-perf-users@vger.kernel.org, linux-cxl@vger.kernel.org
Subject: Re: [PATCH v2 8/9] perf/cxl: Don't use pmu.dev in IRQ and hotplug callbacks after unregister
Date: Wed, 29 Jul 2026 15:34:18 +0000	[thread overview]
Message-ID: <20260729153419.31E0D1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260729145555.3919550-9-dave.jiang@intel.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] The patch correctly fixes a UAF in logging statements during teardown but leaves a critical lifecycle race unaddressed. The IRQ is registered via `devm_request_irq` before `cxl_pmu_perf_unregister` is registered. On device removal, `devm` unwinds LIFO, so `perf_pmu_unregister` runs while the shared IRQ is still live. If the IRQ fires concurrently on another CPU (e.g., due to a co-function changing the shared MSI vector's affinity), `cxl_pmu_irq` can read a non-NULL `event` right before it is detached, leading to a NULL pointer dereference in `__cxl_pmu_read` when it accesses `event->pmu`.
--

--- Patch [8]: [PATCH v2 8/9] perf/cxl: Don't use pmu.dev in IRQ and hotplug callbacks after unregister ---
commit 34ab4c1ad03386965fbc73a1d534f56456842698
Author: Dave Jiang <dave.jiang@intel.com>

perf/cxl: Don't use pmu.dev in IRQ and hotplug callbacks after unregister

The patch replaces info->pmu.dev with info->pmu.parent in the IRQ and CPU
hotplug callbacks to fix a use-after-free during device removal.

Closes: https://sashiko.dev/#/patchset/20260715191454.459673-1-dave@stgolabs.net?part=1

> diff --git a/drivers/perf/cxl_pmu.c b/drivers/perf/cxl_pmu.c
> index 2e817a52ff1e1..f42238b2b6b0d 100644
> --- a/drivers/perf/cxl_pmu.c
> +++ b/drivers/perf/cxl_pmu.c
> @@ -803,7 +803,7 @@ static irqreturn_t cxl_pmu_irq(int irq, void *data)
>  		struct perf_event *event = info->hw_events[i];
>  
>  		if (!event) {
> -			dev_dbg(info->pmu.dev,
> +			dev_dbg(info->pmu.parent,
>  				"overflow but on non enabled counter %d\n", i);
>  			continue;
>  		}

[Severity: High]
This is a pre-existing issue, but since this patch addresses teardown races,
does it leave a critical lifecycle race unaddressed here?

Because the IRQ is registered via devm before cxl_pmu_perf_unregister() is
registered, the LIFO unwinding order means perf_pmu_unregister() runs while
the shared IRQ is still live.

If a shared MSI interrupt fires concurrently with cxl_pmu_perf_unregister(),
cxl_pmu_irq() can read a valid event right before it is detached:

cxl_pmu_irq() {
        ...
        struct perf_event *event = info->hw_events[i];
        ...
        __cxl_pmu_read(event, true);
}

Meanwhile on another CPU, the unregister thread detaches the events and
synchronously sets event->pmu = NULL. When the IRQ handler calls
__cxl_pmu_read(), it dereferences event->pmu:

__cxl_pmu_read() {
        struct cxl_pmu_info *info = pmu_to_cxl_pmu_info(event->pmu);
        ...
}

Could this lead to a null pointer dereference and a kernel panic when
info->base is subsequently accessed during device unbind or module removal?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260729145555.3919550-1-dave.jiang@intel.com?part=8

  reply	other threads:[~2026-07-29 15:34 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-29 14:55 [PATCH v2 0/9] perf/cxlpmu: Misc sashiko raised issues fixes Dave Jiang
2026-07-29 14:55 ` [PATCH v2 1/9] perf/cxl: Program the requested event group on configurable counters Dave Jiang
2026-07-29 15:06   ` sashiko-bot
2026-07-29 22:29   ` Jonathan Cameron
2026-07-30 15:50     ` Dave Jiang
2026-07-29 14:55 ` [PATCH v2 2/9] perf/cxl: Clear stale event fields before reprogramming a counter Dave Jiang
2026-07-29 15:08   ` sashiko-bot
2026-07-29 22:25   ` Jonathan Cameron
2026-07-30 15:45     ` Dave Jiang
2026-07-29 14:55 ` [PATCH v2 3/9] perf/cxl: Fix the counter overflow delta fixup Dave Jiang
2026-07-29 15:13   ` sashiko-bot
2026-07-29 22:21   ` Jonathan Cameron
2026-07-30 16:56     ` Dave Jiang
2026-07-30 17:19       ` Dave Jiang
2026-07-30 19:00       ` Jonathan Cameron
2026-07-29 14:55 ` [PATCH v2 4/9] perf/cxl: Accept an overflow interrupt on MSI message number 0 Dave Jiang
2026-07-29 19:28   ` Jonathan Cameron
2026-07-29 19:59   ` Davidlohr Bueso
2026-07-30 12:18   ` Robin Murphy
2026-07-30 17:57     ` Dave Jiang
2026-07-30 18:57     ` Jonathan Cameron
2026-07-30 21:32       ` Dave Jiang
2026-07-29 14:55 ` [PATCH v2 5/9] perf/cxl: Keep the overflow interrupt pinned to the managed CPU Dave Jiang
2026-07-29 15:23   ` sashiko-bot
2026-07-29 19:25   ` Jonathan Cameron
2026-07-29 20:27   ` Davidlohr Bueso
2026-07-30 11:46   ` Robin Murphy
2026-07-30 18:55     ` Jonathan Cameron
2026-07-30 21:34       ` Dave Jiang
2026-07-30 22:19     ` Dave Jiang
2026-07-29 14:55 ` [PATCH v2 6/9] perf/cxl: Unfreeze counters after handling an overflow interrupt Dave Jiang
2026-07-29 19:24   ` Jonathan Cameron
2026-07-30 12:04   ` Robin Murphy
2026-07-30 18:53     ` Jonathan Cameron
2026-07-30 23:00       ` Dave Jiang
2026-07-29 14:55 ` [PATCH v2 7/9] perf/cxl: Validate the hardware-reported counter width Dave Jiang
2026-07-29 15:11   ` sashiko-bot
2026-07-29 19:21   ` Jonathan Cameron
2026-07-29 14:55 ` [PATCH v2 8/9] perf/cxl: Don't use pmu.dev in IRQ and hotplug callbacks after unregister Dave Jiang
2026-07-29 15:34   ` sashiko-bot [this message]
2026-07-29 19:17   ` Jonathan Cameron
2026-07-30 11:38   ` Robin Murphy
2026-07-30 18:51     ` Jonathan Cameron
2026-07-29 14:55 ` [PATCH v2 9/9] perf/cxl: Avoid cpumask_of(-1) when no CPU is assigned Dave Jiang
2026-07-29 15:19   ` sashiko-bot
2026-07-29 19:14   ` Jonathan Cameron
2026-07-30  9:36     ` Robin Murphy
2026-07-31  0:11     ` Dave Jiang

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