From: sashiko-bot@kernel.org
To: "Terry Bowman" <terry.bowman@amd.com>
Cc: linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v19 08/14] cxl/ras: Handle RCH correctable and uncorrectable errors in one pass
Date: Mon, 03 Aug 2026 22:29:22 +0000 [thread overview]
Message-ID: <20260803222923.517B11F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260803221810.3685703-9-terry.bowman@amd.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Incorrect inline severity calculation for uncorrectable errors fails to apply the uncorrectable error mask, potentially escalating unmasked non-fatal errors to AER_FATAL.
--
--- Patch [8]: [PATCH v19 08/14] cxl/ras: Handle RCH correctable and uncorrectable errors in one pass ---
commit 57f34ecdf069076e73ab0e60927403af518bdfc9
Author: Terry Bowman <terry.bowman@amd.com>
cxl/ras: Handle RCH correctable and uncorrectable errors in one pass
This commit modifies the handling of RCH correctable and uncorrectable errors
to process both in a single pass so co-logged events are not lost. It removes
the cxl_rch_get_aer_severity helper and decodes the uncorrectable severity
inline.
> diff --git a/drivers/cxl/core/ras_rch.c b/drivers/cxl/core/ras_rch.c
> --- a/drivers/cxl/core/ras_rch.c
> +++ b/drivers/cxl/core/ras_rch.c
[ ... ]
> @@ -127,12 +106,21 @@ void cxl_handle_rdport_errors(struct pci_dev *pdev)
> if (!cxl_rch_get_aer_info(dport->regs.dport_aer, &aer_regs))
> return;
>
> - if (!cxl_rch_get_aer_severity(&aer_regs, &severity))
> - return;
> + /*
> + * Handle correctable and uncorrectable errors independently; both
> + * may be set in the same pass and cxl_rch_get_aer_info() has already
> + * cleared both status registers.
> + */
> + if (aer_regs.cor_status & ~aer_regs.cor_mask) {
> + pci_print_aer(pdev, AER_CORRECTABLE, &aer_regs);
> + cxl_handle_cor_ras(dport->dport_dev, to_ras_base(port, dport));
> + }
> +
> + if (aer_regs.uncor_status & ~aer_regs.uncor_mask) {
> + int severity = (aer_regs.uncor_status & aer_regs.uncor_severity) ?
> + AER_FATAL : AER_NONFATAL;
[Severity: High]
Does this inline calculation miss the uncorrectable error mask?
In the previous implementation, the severity check masked uncor_status:
u32 uncor_status = aer_regs->uncor_status & ~aer_regs->uncor_mask;
if (uncor_status) {
*severity = (uncor_status & aer_regs->uncor_severity) ?
AER_FATAL : AER_NONFATAL;
Without applying ~aer_regs.uncor_mask here in the new inline code, if hardware
simultaneously logs a masked fatal error and an unmasked non-fatal error, the
masked fatal bit will be evaluated. Could this wrongly escalate the severity
to AER_FATAL?
>
> - pci_print_aer(pdev, severity, &aer_regs);
> - if (severity == AER_CORRECTABLE)
> - cxl_handle_cor_ras(&pdev->dev, to_ras_base(port, dport));
> - else
> + pci_print_aer(pdev, severity, &aer_regs);
> cxl_do_recovery(pdev, dport->port, dport);
> + }
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260803221810.3685703-1-terry.bowman@amd.com?part=8
next prev parent reply other threads:[~2026-08-03 22:29 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-03 22:17 [PATCH v19 00/14] Enable CXL PCIe Port Protocol Error handling and logging Terry Bowman
2026-08-03 22:17 ` [PATCH v19 01/14] cxl/ras: Fix cxl_rch_get_aer_info() out-of-bounds AER register read Terry Bowman
2026-08-03 22:42 ` sashiko-bot
2026-08-04 16:20 ` Bowman, Terry
2026-08-04 2:10 ` Alison Schofield
2026-08-03 22:17 ` [PATCH v19 02/14] cxl/ras: Fix cxl_rch_get_aer_severity() wrong severity register Terry Bowman
2026-08-03 22:35 ` sashiko-bot
2026-08-04 2:11 ` Alison Schofield
2026-08-03 22:17 ` [PATCH v19 03/14] acpi/apei/ghes: Use raw_spinlock_t for CXL CPER work locks Terry Bowman
2026-08-03 22:39 ` sashiko-bot
2026-08-05 18:41 ` Luck, Tony
2026-08-03 22:18 ` [PATCH v19 04/14] cxl: Tighten CPER kfifo registration API and symbol visibility Terry Bowman
2026-08-03 22:30 ` sashiko-bot
2026-08-04 2:13 ` Alison Schofield
2026-08-03 22:18 ` [PATCH v19 05/14] cxl: Rename find_cxl_port() to find_cxl_port_by_dport() Terry Bowman
2026-08-03 22:29 ` sashiko-bot
2026-08-04 2:14 ` Alison Schofield
2026-08-03 22:18 ` [PATCH v19 06/14] PCI/AER: Introduce AER-CXL protocol error kfifo Terry Bowman
2026-08-03 22:28 ` sashiko-bot
2026-08-04 8:15 ` Richard Cheng
2026-08-04 14:10 ` Bowman, Terry
2026-08-03 22:18 ` [PATCH v19 07/14] PCI: Establish common CXL Port protocol error flow Terry Bowman
2026-08-03 22:56 ` sashiko-bot
2026-08-03 22:18 ` [PATCH v19 08/14] cxl/ras: Handle RCH correctable and uncorrectable errors in one pass Terry Bowman
2026-08-03 22:29 ` sashiko-bot [this message]
2026-08-04 2:16 ` Alison Schofield
2026-08-03 22:18 ` [PATCH v19 09/14] cxl/pci: Thread port and dport through RAS handling helpers Terry Bowman
2026-08-03 22:33 ` sashiko-bot
2026-08-04 2:16 ` Alison Schofield
2026-08-03 22:18 ` [PATCH v19 10/14] cxl: Update CXL Endpoint AER handler Terry Bowman
2026-08-03 22:40 ` sashiko-bot
2026-08-04 2:17 ` Alison Schofield
2026-08-03 22:18 ` [PATCH v19 11/14] PCI: Cache PCI DSN into pci_dev->dsn during probe Terry Bowman
2026-08-03 22:29 ` sashiko-bot
2026-08-04 2:26 ` Alison Schofield
2026-08-03 22:18 ` [PATCH v19 12/14] cxl: Add port and dport identifiers to CXL AER trace events Terry Bowman
2026-08-03 22:42 ` sashiko-bot
2026-08-04 2:27 ` Alison Schofield
2026-08-04 7:56 ` Richard Cheng
2026-08-04 13:46 ` Bowman, Terry
2026-08-03 22:18 ` [PATCH v19 13/14] PCI/CXL: Mask/Unmask CXL protocol errors Terry Bowman
2026-08-03 22:55 ` sashiko-bot
2026-08-04 2:29 ` Alison Schofield
2026-08-03 22:18 ` [PATCH v19 14/14] Documentation: cxl: Document CXL protocol error handling Terry Bowman
2026-08-03 22:31 ` sashiko-bot
2026-08-04 2:30 ` Alison Schofield
2026-08-05 21:19 ` [PATCH v19 00/14] Enable CXL PCIe Port Protocol Error handling and logging Dave Jiang
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