From: sashiko-bot@kernel.org
To: "Srirangan Madhavan" <smadhavan@nvidia.com>
Cc: linux-pci@vger.kernel.org, linux-cxl@vger.kernel.org
Subject: Re: [PATCH v11 05/12] cxl: Cache endpoint decoder settings during PCI enumeration
Date: Wed, 02 Sep 2026 07:41:19 +0000 [thread overview]
Message-ID: <20260902074119.8F64E1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260902072804.665639-6-smadhavan@nvidia.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Mixing goto-based error handling with scope-based cleanup helpers (`scoped_guard`) in `__pci_cxl_hdm_init()`.
--
commit 240aef0efe56885a67760e149786f74d4a709d41
Author: Srirangan Madhavan <smadhavan@nvidia.com>
cxl: Cache endpoint decoder settings during PCI enumeration
This commit populates pci_dev->hdm for CXL.mem functions from
pci_bus_add_device(), after final PCI fixups but before driver binding.
It uses the CXL Register Locator BAR Indicator to find the component
register BAR and reject unassigned or disabled memory BAR resources.
> diff --git a/drivers/cxl/core/resource.c b/drivers/cxl/core/resource.c
> index e6aa55079c76e..a43a29e086501 100644
> --- a/drivers/cxl/core/resource.c
> +++ b/drivers/cxl/core/resource.c
[ ... ]
> +static int __pci_cxl_hdm_init(struct pci_dev *pdev)
> +{
> + struct cxl_register_map map = { 0 };
> + struct cxl_hdm_info *info;
> + int rc;
> +
> + scoped_guard(rwsem_read, &cxl_rwsem.dpa) {
> + if (pdev->hdm)
> + return 0;
> + }
[ ... ]
> + info = kzalloc_obj(*info, GFP_KERNEL);
> + if (!info)
> + return -ENOMEM;
> +
> + rc = cxl_pci_hdm_read_info(pdev, &map, info);
> + if (rc)
> + goto out_free_info;
> +
> + scoped_guard(rwsem_write, &cxl_rwsem.dpa) {
> + if (!pdev->hdm) {
> + pdev->hdm = info;
> + info = NULL;
> + } else {
> + cxl_pci_hdm_info_free(info);
> + }
> + }
> +
> + return 0;
> +
> +out_free_info:
> + cxl_pci_hdm_info_free(info);
> + return rc;
> +}
[Severity: Low]
Does this code violate the cleanup API guidelines by mixing goto-based error
handling with scope-based cleanup helpers (scoped_guard) in
__pci_cxl_hdm_init()?
The expectation in include/linux/cleanup.h is that goto and cleanup helpers
are never mixed in the same function. Could this be converted to use
scope-based cleanup for the info allocation as well, to avoid confusing
ownership and maintenance hazards in the future?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260902072804.665639-1-smadhavan@nvidia.com?part=5
next prev parent reply other threads:[~2026-09-02 7:41 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-02 7:27 [PATCH v11 00/12] PCI/CXL: Add CXL reset support for Type 2 devices Srirangan Madhavan
2026-09-02 7:27 ` [PATCH v11 01/12] cxl: Move HDM decoder programming helpers Srirangan Madhavan
2026-09-02 8:00 ` sashiko-bot
2026-09-02 7:27 ` [PATCH v11 02/12] cxl: Make HDM commit helpers available to reset code Srirangan Madhavan
2026-09-02 7:37 ` sashiko-bot
2026-09-02 7:27 ` [PATCH v11 03/12] cxl: Share HDM decoder decode logic Srirangan Madhavan
2026-09-02 7:39 ` sashiko-bot
2026-09-02 7:27 ` [PATCH v11 04/12] cxl: Cache decoder settings on PCI devices Srirangan Madhavan
2026-09-02 7:40 ` sashiko-bot
2026-09-02 7:27 ` [PATCH v11 05/12] cxl: Cache endpoint decoder settings during PCI enumeration Srirangan Madhavan
2026-09-02 7:41 ` sashiko-bot [this message]
2026-09-02 14:03 ` Li Ming
2026-09-02 7:27 ` [PATCH v11 06/12] cxl: Add CXL Device Reset helper Srirangan Madhavan
2026-09-02 7:35 ` sashiko-bot
2026-09-02 7:27 ` [PATCH v11 07/12] cxl: Validate HDM ranges before CXL reset Srirangan Madhavan
2026-09-02 7:42 ` sashiko-bot
2026-09-04 9:19 ` Richard Cheng
2026-09-02 7:28 ` [PATCH v11 08/12] PCI/CXL: Reject CXL Reset on multifunction devices Srirangan Madhavan
2026-09-02 7:39 ` sashiko-bot
2026-09-04 9:26 ` Richard Cheng
2026-09-02 7:28 ` [PATCH v11 09/12] cxl: Restore CXL HDM state after PCI reset Srirangan Madhavan
2026-09-02 7:45 ` sashiko-bot
2026-09-04 9:23 ` Richard Cheng
2026-09-02 7:28 ` [PATCH v11 10/12] PCI/CXL: Expose CXL Reset as a PCI reset method Srirangan Madhavan
2026-09-02 7:51 ` sashiko-bot
2026-09-02 7:28 ` [PATCH v11 11/12] Documentation/ABI: Document CXL Reset " Srirangan Madhavan
2026-09-02 7:40 ` sashiko-bot
2026-09-02 7:28 ` [PATCH v11 12/12] PCI/CXL: Restore HDM state after CXL bus reset Srirangan Madhavan
2026-09-02 7:54 ` sashiko-bot
2026-09-04 9:15 ` [PATCH v11 00/12] PCI/CXL: Add CXL reset support for Type 2 devices Richard Cheng
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