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[73.170.217.179]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3396e7e477csm3435658eec.29.2026.09.08.03.22.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2026 03:22:27 -0700 (PDT) From: Anisa Su X-Google-Original-From: Anisa Su To: linux-cxl@vger.kernel.org Cc: alison.schofield@intel.com, jic23@kernel.org, dave.jiang@intel.com, gourry@gourry.net, icheng@nvidia.com, ming.li@zohomail.com, vishal.l.verma@intel.com, dave@stgolabs.net, benjamin.cheatham@amd.com, Anisa Su Subject: [RESEND PATCH v13 8/8] Documentation/cxl: Document DPA partition layout and ordering rules Date: Tue, 8 Sep 2026 03:15:12 -0700 Message-ID: <20260908102124.2231730-10-anisa.su@samsung.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260908102124.2231730-2-anisa.su@samsung.com> References: <20260908102124.2231730-2-anisa.su@samsung.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit DC Partitions complicate DPA ordering. Add a DPA Partitions section to cxl-driver.rst describing spec-mandated and Linux requirements for the layout. Suggested-by: Gregory Price Signed-off-by: Anisa Su --- New patch in v13. --- .../driver-api/cxl/linux/cxl-driver.rst | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/Documentation/driver-api/cxl/linux/cxl-driver.rst b/Documentation/driver-api/cxl/linux/cxl-driver.rst index dd6dd17dc536..f0742d6c86c3 100644 --- a/Documentation/driver-api/cxl/linux/cxl-driver.rst +++ b/Documentation/driver-api/cxl/linux/cxl-driver.rst @@ -181,6 +181,44 @@ A Memory Device is a discrete base object that is not a port. While the physical device it belongs to may also host an `endpoint`, the relationship between an `endpoint` and a `memdev` is not captured in sysfs. +DPA Partitions +~~~~~~~~~~~~~~ +A memory device presents its capacity as one flat `Device Physical Address` +(DPA) space divided into `partitions`, which Linux lays out in a fixed +order:: + + DPA 0 end + +---------------+---------------+---------------------------+ + | ram | pmem | dynamic_ram_1 | + +---------------+---------------+---------------------------+ + part[0] part[1] part[2] + +Part of that order is required by the CXL specification and part of it is a +Linux choice. + +The `ram` and `pmem` order is mandated. CXL r4.0 section 8.2.10.9.2.1 "Get +Partition Info" (4100h), Table 8-310, mandates that volatile capacity starts +at DPA 0 and pmem starts at the DPA immediately following it. + +Dynamic Capacity partitions only need to be 256MB aligned according to +CXL r4.0 section 8.2.10.9.9.1 "Get Dynamic Capacity Configuration" +(opcode 4800h), Table 8-347. So a device could leave a gap between ram/pmem +(static) capacity and its first DC partition, or between one DC partition +and the next. + +Linux follows the static precedent anyway for the partition it maps: the +first DC partition must begin at the DPA immediately following static +capacity -- after pmem, after ram on a device with no pmem, or at DPA 0 on +a device with no static capacity at all. + +Currently, only one dynamic partition is supported. A device may report up +to eight (CXL r4.0 Table 8-346); Linux configures the first and exposes it as +`dynamic_ram_1`. + +Support for additional dynamic partitions may be added if devices appear +that need it, which is what the `dynamic_ram_1` name leaves room for. Until +then a device offering more than one is still usable, just not in full. + Port Relationships ~~~~~~~~~~~~~~~~~~ In our example described above, there are four host bridges attached to the -- 2.43.0