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Wed, 16 Sep 2026 11:45:01 -0700 From: To: , , , , , , , , , , , , , , , CC: , , , , , , Subject: [PATCH v2 05/10] hw/vfio/pci: Back the CXL memory with a RAM-device region Date: Thu, 17 Sep 2026 00:14:07 +0530 Message-ID: <20260916184412.3825713-6-mhonap@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260916184412.3825713-1-mhonap@nvidia.com> References: <20260916184412.3825713-1-mhonap@nvidia.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail202.nvidia.com (10.129.68.7) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002315:EE_|SJ2PR12MB7944:EE_ X-MS-Office365-Filtering-Correlation-Id: 050f17fd-208c-45b2-e2c1-08df1422b2a5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|23010399003|376014|82310400026|1800799024|7416014|921020|10067099003|18002099003|56012099006|11063799006|22082099003; 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It stays out of the guest address space until the guest commits its decoder and QEMU learns the GPA to place it at. AI-used-for: code (prototype) Signed-off-by: Manish Honap --- hw/vfio/pci.c | 34 ++++++++++++++++++++++++++++++++++ hw/vfio/pci.h | 1 + 2 files changed, 35 insertions(+) diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 10b13f200d..4716266595 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -3221,8 +3221,11 @@ bool vfio_pci_populate_device(VFIOPCIDevice *vdev, Error **errp) return true; } +static void vfio_cxl_teardown(VFIOPCIDevice *vdev); + void vfio_pci_put_device(VFIOPCIDevice *vdev) { + vfio_cxl_teardown(vdev); vfio_display_finalize(vdev); vfio_bars_finalize(vdev); vfio_cpr_pci_unregister_device(vdev); @@ -3696,11 +3699,42 @@ static bool vfio_cxl_setup(VFIOPCIDevice *vdev, Error **errp) return false; } + /* + * The HDM memory is host physical. Set up the region, which installs the + * fd read/write path, and mmap it for direct guest access; it is added to + * the guest address space only once the guest commits its endpoint decoder. + */ + if (vfio_region_setup(OBJECT(vdev), vbasedev, &cxl->mem_region, + cxl->mem_region_index, "cxl-mem", errp)) { + return false; + } + if (vfio_region_mmap(&cxl->mem_region)) { + /* + * Without mmap the region falls back to the kernel's fd read/write + * path, which works but traps every access. Warn rather than fail. + */ + warn_report("vfio-cxl: %s: failed to mmap the HDM memory region; " + "performance may be slow", vbasedev->name); + } + cxl->enabled = true; return true; } +static void vfio_cxl_teardown(VFIOPCIDevice *vdev) +{ + VFIOCXL *cxl = &vdev->cxl; + + if (!cxl->enabled) { + return; + } + if (cxl->mem_region.mem) { + vfio_region_exit(&cxl->mem_region); + vfio_region_finalize(&cxl->mem_region); + } +} + static void vfio_pci_realize(PCIDevice *pdev, Error **errp) { ERRP_GUARD(); diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h index 7fdd695704..06d15e807d 100644 --- a/hw/vfio/pci.h +++ b/hw/vfio/pci.h @@ -134,6 +134,7 @@ typedef struct VFIOCXL { uint32_t comp_bar; /* component BAR carrying that block */ uint64_t hdm_offset; /* block offset within the component BAR */ uint64_t dpa_size; /* size of the HDM memory region */ + VFIORegion mem_region; /* HDM memory, mapped at committed GPA */ } VFIOCXL; struct VFIOPCIDevice { -- 2.25.1