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Mon, 21 Sep 2026 12:55:53 -0500 From: To: , CC: , , , , , , , Alejandro Lucero Subject: [PATCH v1 3/4] cxl/memdev: Add support for multi PF devices Date: Mon, 21 Sep 2026 20:12:38 +0100 Message-ID: <20260921191239.4249-4-alucerop@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260921191239.4249-1-alucerop@amd.com> References: <20260921191239.4249-1-alucerop@amd.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBF:EE_|EAYPR12MB964616:EE_ X-MS-Office365-Filtering-Correlation-Id: 2dffaaf4-c9d7-4b16-4de5-08df180995aa X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|23010399003|376014|36860700016|82310400026|6133799003|10067099003|11063799006|22082099003|18002099003|56012099006; X-Microsoft-Antispam-Message-Info: UYrbMcV5v1Fn1oATSYE3ShP8TuV1cew+aSM+ewqJr9pNAVYwWmsEN+bL4jTdPFuQqHlr0uCRpbQrMUNWB1eXlhgl7IIBLk5HasT7INuub4QjnuHFIsZ2LhTJ8lNxdJeUhJXkJBAr2gEiJ0qIOpd6w+iGFWSfPOqnxMCSv79+1ORNmuuWbZSJvEv4MkVOYEST3j21fTDrDJPcN4WcvBRohDOAugzLklbmY0/Z3VcBjihl1KM1FP8CaN0WKuwqUXZtGlrlb97EgsE669zXuvZrGeZwmcNK0wBi8Jl114fr5reXR3FOU96VK32m7H1Meg1Rxwc9ER6tkT4y/LNp8MRaNzs8XCsjQMpTHbyUG2N7KS2CohHvEW48lQtJo1ic6r4PIKyb2C6ipSE8HVB7juhSDljoMQCRmovd6ruR5/Zx6GJV3jWnK4UOT2/6yZk6GJWHirjtmSWUW+xRdYszEmAAyh3fpUIiJi7SqlNJr25aBFJLHjgKMJn8+nPh8WL6IJn2d/LPugXO+NWvCKZk9f9F2J5EoYlVTX2Xq6ncz3q5Vb4ovs73BK0nI+3ST+PWCofaC34djJvhboRmfhc5keH7qKu+fJIVerxwnmRJal9rl8+pC5+iE9FqD39xDZNc+YzefmKSxZkFJBM8l67ImQibxC7SWWoxraI7PbajfSNpkW3CDbSnOIpH/cE4TlUnlLXOlTRtRXXmCpPBsba3truQEw== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(23010399003)(376014)(36860700016)(82310400026)(6133799003)(10067099003)(11063799006)(22082099003)(18002099003)(56012099006);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: rvvGGHd+QR+fO34p3PdMxNAihlWwTJusroUP97JssrAdN1o52HUNtXdSJB241CYmFZWnmtVXyGl+/QHxmm27+nuy6L+SSJjMwp+T9RN5o/Wx0xUhs1n9EZIovq7Ah7iz76ZWvQi7kz3andHbT/Kc4qXJAOQgR8bfqQRaW+3XuIsASGxfn5+uuodc1lZLD/FCIotifsjBfl2PUACzAUvMxLsQqULpwSKkm/ZZtzJQdxynZz0Ub5WD9aw3LIL6OsuNOoEjjq0rkSRG6B8wqy/LfYH8cCHsU8wQmvFBdZQXrTatcrSOK2ea20XVnBtnF1VgjlNBcG19wBUZIFSIWV2yyCBPhmv5YqU6BuT0YqitAX+cWrr+B2RPQsGA0JWmn88e886ZzlMZOFVHNP/o63MFvCV90DWMSRV1xTuO+UPaESyC97Zv6nfJsxr3Z8MzLq9o X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Sep 2026 17:55:55.4210 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2dffaaf4-c9d7-4b16-4de5-08df180995aa X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBF.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: EAYPR12MB964616 From: Alejandro Lucero A PCI device can present multiple Physical Functions(PFs) but the CXL specs restrict to the first one, PF0, the discovery and management of CXL capabilities accessed through a PF0 BAR. Other non-PF0 PFs need to obtain the CXL.mem range to work with somehow. Add a device link between the cxl region a PF0 memdev is attached to and the non-PF0 wanting to use the CXL region. A CXL region release will trigger such a PF to be released from its driver first. PF0 being unbound from its driver triggers memdev and region release leading to non-PF0s being unbound first keeping the CXL memory use safe. Signed-off-by: Alejandro Lucero --- drivers/cxl/core/memdev.c | 66 +++++++++++++++++++++++++++++++++++++++ include/cxl/cxl.h | 1 + 2 files changed, 67 insertions(+) diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c index b3419df586b9..67be02faa7e1 100644 --- a/drivers/cxl/core/memdev.c +++ b/drivers/cxl/core/memdev.c @@ -802,6 +802,72 @@ static struct cxl_memdev *cxl_memdev_alloc(struct cxl_dev_state *cxlds, return ERR_PTR(rc); } +static int match_memdev_by_parent_device(struct device *dev, const void *data) +{ + const struct device *pf_dev = data; + struct cxl_memdev *cxlmd; + + if (!is_cxl_memdev(dev)) + return 0; + + cxlmd = to_cxl_memdev(dev); + return (cxlmd->cxlds->dev == pf_dev); +} + +/** + * cxl_get_pf0_memdev - register a device link with the region PF0 memdev is + * attached to. The region release will imply the link consumer to be unbound + * from its driver first. + * + * @pf0: device to use for finding target memdev. + * @pfx: device to link to PF0's memdev region, the link consumer. + * @range: to be set with the PF0's memdev range. + * + * Return: PF0 memdev pointer or error. + */ +struct cxl_memdev *cxl_get_pf0_memdev(struct device *pf0, struct device *pfx, + struct range *range) +{ + struct cxl_attach_region *attach; + struct cxl_memdev *cxlmd; + struct device *mem_dev __free(put_device) = + bus_find_device(&cxl_bus_type, NULL, pf0, + match_memdev_by_parent_device); + + if (!mem_dev) + return ERR_PTR(-ENODEV); + + cxlmd = to_cxl_memdev(mem_dev); + + /* + * we got the cxl_memdev and the implicit get_device in bus_find_device + * makes the next steps safe. + */ + attach = container_of(cxlmd->attach, struct cxl_attach_region, attach); + + /* + * The cxlmd object does exist and it can be found in the cxl bus after + * creation but before attach probe setting the proper HPA range. If so, + * the caller will need to try later. + */ + if (attach->hpa_range.end == -1) + return ERR_PTR(-EPROBE_DEFER); + + /* + * Create the device link between the region and the consumer device. + * AUTOREMOVE_CONSUMER means the link implicitly to be removed if the + * consumer unbinds first with no consequences for the supplier. + */ + if (!device_link_add(pfx, &attach->cxlr->dev, DL_FLAG_AUTOREMOVE_CONSUMER)) + return ERR_PTR(-ENODEV); + + range->start = attach->hpa_range.start; + range->end = attach->hpa_range.end; + + return to_cxl_memdev(mem_dev); +} +EXPORT_SYMBOL_NS_GPL(cxl_get_pf0_memdev, "CXL"); + static long __cxl_memdev_ioctl(struct cxl_memdev *cxlmd, unsigned int cmd, unsigned long arg) { diff --git a/include/cxl/cxl.h b/include/cxl/cxl.h index 802b143de83d..e3b1e5be95f8 100644 --- a/include/cxl/cxl.h +++ b/include/cxl/cxl.h @@ -228,4 +228,5 @@ struct cxl_memdev *devm_cxl_probe_mem(struct cxl_dev_state *cxlds, struct range *range); int cxl_set_capacity(struct cxl_dev_state *cxlds, u64 capacity); +struct cxl_memdev *cxl_get_pf0_memdev(struct device *pf0, struct device *pfx, struct range *range); #endif /* __CXL_CXL_H__ */ -- 2.34.1