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Wed, 4 Nov 2026 18:54:58 -0500 (EST) Date: Wed, 4 Nov 2026 16:52:56 -0700 From: Alex Williamson To: Cc: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , alex@shazbot.org Subject: Re: [PATCH v6 03/31] cxl: Move component register defines to uapi/cxl/cxl_regs.h Message-ID: <20261104165256.09860477@shazbot.org> In-Reply-To: <20261016161839.2765592-4-mhonap@nvidia.com> References: <20261016161839.2765592-1-mhonap@nvidia.com> <20261016161839.2765592-4-mhonap@nvidia.com> X-Mailer: Claws Mail 4.4.0 (GTK 3.24.52; x86_64-pc-linux-gnu) X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Fri, 16 Oct 2026 21:48:10 +0530 wrote: > diff --git a/include/uapi/cxl/cxl_regs.h b/include/uapi/cxl/cxl_regs.h > new file mode 100644 > index 000000000000..276f9361c840 > --- /dev/null > +++ b/include/uapi/cxl/cxl_regs.h > @@ -0,0 +1,56 @@ > +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ > +/* Copyright (c) 2026 NVIDIA Corporation & Affiliates */ > + > +#ifndef _UAPI_CXL_REGS_H_ > +#define _UAPI_CXL_REGS_H_ > + > +#include > +#include > + > +/* CXL r4.0 sec 8.2.3 Component Register Layout and Definition */ > +#define CXL_COMPONENT_REG_BLOCK_SIZE 0x10000 > + > +/* CXL r4.0 sec 8.2.4 CXL.cache and CXL.mem Registers */ > +#define CXL_CM_OFFSET 0x1000 > +#define CXL_CM_CAP_HDR_OFFSET 0x0 > +#define CXL_CM_CAP_HDR_ID_MASK __GENMASK(15, 0) A local sashiko review asks if this new uapi header should include asm/bitsperlong.h since __GENMASK requires __BITS_PER_LONG. We include the other two header dependencies, but not this one, so it's a bit self-inconsistent. BTW, current guidance on the Assisted-by tag: 1e035297ffda ("docs: remove Assisted-by references"). Thanks, Alex