Re: [PATCH v2] cxl: Remove ifdef blocks of CONFIG_PCIEAER_CXL from core/pci.c

["Bowman, Terry" <terry.bowman@amd.com>]

On 7/21/2025 12:04 PM, Dave Jiang wrote:
> Remove from core/pci_aer.c and move the CONFIG_PCIEAER_CXL ifdef to
> cxlpci.h to deal with the exported symbols as needed. There is enough
> AER handling code (and more to come) to move the AER code to its own
> C file.
> 
> Cc: Robert Richter <rrichter@amd.com>
> Cc: Terry Bowman <terry.bowman@amd.com>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> ---
> v2:
> - Address 0-day reprot of cxl_handle_rdport_errors symbol undefined
> ---
>  drivers/cxl/core/Makefile  |   1 +
>  drivers/cxl/core/core.h    |   9 ++
>  drivers/cxl/core/pci.c     | 171 +------------------------------------
>  drivers/cxl/core/pci_aer.c | 168 ++++++++++++++++++++++++++++++++++++
>  drivers/cxl/cxl.h          |   8 --
>  drivers/cxl/cxlpci.h       |   8 ++
>  tools/testing/cxl/Kbuild   |   1 +
>  7 files changed, 189 insertions(+), 177 deletions(-)
>  create mode 100644 drivers/cxl/core/pci_aer.c
> 
> diff --git a/drivers/cxl/core/Makefile b/drivers/cxl/core/Makefile
> index 79e2ef81fde8..bcea856157af 100644
> --- a/drivers/cxl/core/Makefile
> +++ b/drivers/cxl/core/Makefile
> @@ -21,3 +21,4 @@ cxl_core-$(CONFIG_CXL_REGION) += region.o
>  cxl_core-$(CONFIG_CXL_MCE) += mce.o
>  cxl_core-$(CONFIG_CXL_FEATURES) += features.o
>  cxl_core-$(CONFIG_CXL_EDAC_MEM_FEATURES) += edac.o
> +cxl_core-$(CONFIG_PCIEAER_CXL) += pci_aer.o
> diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h
> index 29b61828a847..96c319c66a48 100644
> --- a/drivers/cxl/core/core.h
> +++ b/drivers/cxl/core/core.h
> @@ -136,4 +136,13 @@ int cxl_set_feature(struct cxl_mailbox *cxl_mbox, const uuid_t *feat_uuid,
>  		    u16 *return_code);
>  #endif
>  
> +#ifdef CONFIG_PCIEAER_CXL
> +void cxl_handle_rdport_errors(struct cxl_dev_state *cxlds);
> +#else
> +static inline void cxl_handle_rdport_errors(struct cxl_dev_state *cxlds) {}
> +#endif
> +
> +void __cxl_handle_cor_ras(struct cxl_dev_state *cxlds, void __iomem *ras_base);
> +bool __cxl_handle_ras(struct cxl_dev_state *cxlds, void __iomem *ras_base);
> +
>  #endif /* __CXL_CORE_H__ */

Hi Dave,

Any reason not to pull in cxl_handle_cor_ras()/cxl_handle_ras() into pci_ras.c?
These 2 functions read the RAS from the register block and then call the trace routine.
These are only called by the handlers in pci.c. I think it might round-out your changes 
nicely if they are moved into pci_ras.c s.t. when CONFIG_PCIEAER_CXL is disabled then 
they are do nothing. Or another way to look at it is they should only be enabled if 
CONFIG_PCIEAER_CXL is enabled.

-Terry

[snip]