From: Dave Jiang <dave.jiang@intel.com>
To: Alison Schofield <alison.schofield@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>
Cc: linux-cxl@vger.kernel.org
Subject: Re: [PATCH] cxl/region: Use do_div() for 64-bit modulo operation
Date: Mon, 19 Jan 2026 08:17:03 -0700 [thread overview]
Message-ID: <301d09af-7fd2-47e2-b66a-d362bf8a9690@intel.com> (raw)
In-Reply-To: <20260117044732.567831-1-alison.schofield@intel.com>
On 1/16/26 9:47 PM, Alison Schofield wrote:
> div64_u64_rem() was the wrong choice for doing a modulo operation
> and it was used incorrectly, causing a kernel oops by passing NULL
> as the remainder parameter. Replace it with the do_div() helper
> that does the intended math (gran_offset = offset % gran) and is
> architecture safe.
>
> This bug appeared during testing of unaligned address translations.
> The visibility to userspace would be limited to folks doing poison
> injection or clear by HPA on unaligned regions.
>
> Fixes: 78b50b598462 ("cxl/region: Translate HPA to DPA and memdev in unaligned regions")
> Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Thanks Alison. I'll get this applied to next
> ---
> drivers/cxl/core/region.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index d5979000fba1..96888d87a8df 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -3324,6 +3324,7 @@ static int unaligned_region_offset_to_dpa_result(struct cxl_region *cxlr,
> u64 interleave_width, interleave_index;
> u64 gran, gran_offset, dpa_offset;
> u64 hpa = p->res->start + offset;
> + u64 tmp = offset;
>
> /*
> * Unaligned addresses are not algebraically invertible. Calculate
> @@ -3333,7 +3334,7 @@ static int unaligned_region_offset_to_dpa_result(struct cxl_region *cxlr,
> gran = cxld->interleave_granularity;
> interleave_width = gran * cxld->interleave_ways;
> interleave_index = div64_u64(offset, interleave_width);
> - gran_offset = div64_u64_rem(offset, gran, NULL);
> + gran_offset = do_div(tmp, gran);
>
> dpa_offset = interleave_index * gran + gran_offset;
>
>
> base-commit: 78b50b5984629d362f826e9615ce4599f429716e
next prev parent reply other threads:[~2026-01-19 15:17 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-17 4:47 [PATCH] cxl/region: Use do_div() for 64-bit modulo operation Alison Schofield
2026-01-19 15:17 ` Dave Jiang [this message]
2026-01-19 15:43 ` Dave Jiang
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