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From: "Verma, Vishal L" <vishal.l.verma@intel.com>
To: "Schofield, Alison" <alison.schofield@intel.com>
Cc: "linux-cxl@vger.kernel.org" <linux-cxl@vger.kernel.org>,
	"nvdimm@lists.linux.dev" <nvdimm@lists.linux.dev>
Subject: Re: [ndctl PATCH] cxl/test: Add 3-way HB interleave testcase to cxl-xor-region.sh
Date: Wed, 14 Feb 2024 19:28:45 +0000	[thread overview]
Message-ID: <3740aad81564f41c7d4e175682a1881253fc2cd6.camel@intel.com> (raw)
In-Reply-To: <20240214071447.1918988-1-alison.schofield@intel.com>

On Tue, 2024-02-13 at 23:14 -0800, alison.schofield@intel.com wrote:
> From: Alison Schofield <alison.schofield@intel.com>
> 
> cxl-xor-region.sh includes test cases for 1 & 2 way host bridge
> interleaves. Add a new test case to exercise the modulo math
> function the CXL driver uses to find positions in a 3-way host
> bridge interleave.
> 
> Skip this test case, don't fail, if the new 3-way XOR decoder
> is not present in cxl/test.
> 
> Add the missing check_dmesg helper before exiting this test.
> 
> Signed-off-by: Alison Schofield <alison.schofield@intel.com>
> ---
>  test/cxl-xor-region.sh | 33 +++++++++++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/test/cxl-xor-region.sh b/test/cxl-xor-region.sh
> index 117e7a4bba61..2f3b4aa5208a 100644
> --- a/test/cxl-xor-region.sh
> +++ b/test/cxl-xor-region.sh
> @@ -86,11 +86,44 @@ setup_x4()
>          memdevs="$mem0 $mem1 $mem2 $mem3"
>  }
>  
> +setup_x3()
> +{
> +        # find an x3 decoder
> +        decoder=$($CXL list -b cxl_test -D -d root | jq -r ".[] |
> +          select(.pmem_capable == true) |
> +          select(.nr_targets == 3) |
> +          .decoder")

Are these lines..

> +
> +	if [[ ! $decoder ]]; then
> +		echo "no x3 decoder found, skipping xor-x3 test"
> +		return
> +	fi
> +
> +        # Find a memdev for each host-bridge interleave position
> +        port_dev0=$($CXL list -T -d "$decoder" | jq -r ".[] |
> +            .targets | .[] | select(.position == 0) | .target")
> +        port_dev1=$($CXL list -T -d "$decoder" | jq -r ".[] |
> +            .targets | .[] | select(.position == 1) | .target")
> +        port_dev2=$($CXL list -T -d "$decoder" | jq -r ".[] |
> +            .targets | .[] | select(.position == 2) | .target")

..and these mis-indented?

Looks good otherwise.

> +	mem0=$($CXL list -M -p "$port_dev0" | jq -r ".[0].memdev")
> +	mem1=$($CXL list -M -p "$port_dev1" | jq -r ".[0].memdev")
> +	mem2=$($CXL list -M -p "$port_dev2" | jq -r ".[0].memdev")
> +	memdevs="$mem0 $mem1 $mem2"
> +}
> +
>  setup_x1
>  create_and_destroy_region
>  setup_x2
>  create_and_destroy_region
>  setup_x4
>  create_and_destroy_region
> +# x3 decoder may not be available in cxl/test topo yet
> +setup_x3
> +if [[ $decoder ]]; then
> +	create_and_destroy_region
> +fi
> +
> +check_dmesg "$LINENO"
>  
>  modprobe -r cxl_test


  reply	other threads:[~2024-02-14 19:28 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-14  7:14 [ndctl PATCH] cxl/test: Add 3-way HB interleave testcase to cxl-xor-region.sh alison.schofield
2024-02-14 19:28 ` Verma, Vishal L [this message]
2024-02-14 21:49   ` Alison Schofield

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