From: Shiju Jose <shiju.jose@huawei.com>
To: Li Ming <ming.li@zohomail.com>,
"dave@stgolabs.net" <dave@stgolabs.net>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
"dave.jiang@intel.com" <dave.jiang@intel.com>,
"alison.schofield@intel.com" <alison.schofield@intel.com>,
"vishal.l.verma@intel.com" <vishal.l.verma@intel.com>,
"ira.weiny@intel.com" <ira.weiny@intel.com>,
"dan.j.williams@intel.com" <dan.j.williams@intel.com>
Cc: "linux-cxl@vger.kernel.org" <linux-cxl@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 1/1] cxl/edac: Fix using wrong repair type to check dram event record
Date: Tue, 24 Jun 2025 14:49:08 +0000 [thread overview]
Message-ID: <3f0636a92de94d608276a1f6da17e4d7@huawei.com> (raw)
In-Reply-To: <20250620052924.138892-1-ming.li@zohomail.com>
>-----Original Message-----
>From: Li Ming <ming.li@zohomail.com>
>Sent: 20 June 2025 06:29
>To: dave@stgolabs.net; Jonathan Cameron <jonathan.cameron@huawei.com>;
>dave.jiang@intel.com; alison.schofield@intel.com; vishal.l.verma@intel.com;
>ira.weiny@intel.com; dan.j.williams@intel.com; Shiju Jose
><shiju.jose@huawei.com>
>Cc: linux-cxl@vger.kernel.org; linux-kernel@vger.kernel.org; Li Ming
><ming.li@zohomail.com>
>Subject: [PATCH 1/1] cxl/edac: Fix using wrong repair type to check dram event
>record
>
>cxl_find_rec_dram() is used to find a DRAM event record based on the inputted
>attributes. Different repair_type of the inputted attributes will check the DRAM
>event record in different ways.
>When EDAC driver is performing a memory rank sparing, it should use
>CXL_RANK_SPARING rather than CXL_BANK_SPARING as repair_type for DRAM
>event record checking.
>
>Fixes: 588ca944c277 ("cxl/edac: Add CXL memory device memory sparing
>control feature")
>Signed-off-by: Li Ming <ming.li@zohomail.com>
>---
>base-commit: 3c70ec71abdaf4e4fa48cd8fdfbbd864d78235a8 cxl/fixes
Reviewed-by: Shiju Jose <shiju.jose@huawei.com>
>---
> drivers/cxl/core/edac.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/drivers/cxl/core/edac.c b/drivers/cxl/core/edac.c index
>d725ee954199..623aaa4439c4 100644
>--- a/drivers/cxl/core/edac.c
>+++ b/drivers/cxl/core/edac.c
>@@ -1323,7 +1323,7 @@ cxl_mem_get_rec_dram(struct cxl_memdev *cxlmd,
> attrbs.bank = ctx->bank;
> break;
> case EDAC_REPAIR_RANK_SPARING:
>- attrbs.repair_type = CXL_BANK_SPARING;
>+ attrbs.repair_type = CXL_RANK_SPARING;
> break;
> default:
> return NULL;
>--
>2.34.1
next prev parent reply other threads:[~2025-06-24 14:49 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-20 5:29 [PATCH 1/1] cxl/edac: Fix using wrong repair type to check dram event record Li Ming
2025-06-23 18:13 ` Ira Weiny
2025-06-24 14:38 ` Jonathan Cameron
2025-06-24 14:49 ` Shiju Jose [this message]
2025-06-25 18:17 ` Dave Jiang
2025-06-25 18:56 ` Fan Ni
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