Re: [PATCH] cxl_test: Limit location for fake CFMWS to mappable range

[Dave Jiang <dave.jiang@intel.com>]

On 6/9/25 5:02 PM, Itaru Kitayama wrote:
> 
> 
>> On Jun 10, 2025, at 2:25, Dave Jiang <dave.jiang@intel.com> wrote:
>>
>> 
>>
>>> On 5/27/25 8:34 AM, Jonathan Cameron wrote:
>>> Some architectures (e.g. arm64) only support memory hotplug operations on
>>> a restricted set of physical addresses. This applies even when we are
>>> faking some CXL fixed memory windows for the purposes of cxl_test.
>>> That range can be queried with mhp_get_pluggable_range(true). Use the
>>> minimum of that the top of that range and iomem_resource.end to establish
>>> the 64GiB region used by cxl_test.
>>>
>>> From thread #2 which was related to the issue in #1.
>>>
>>> Link: https://lore.kernel.org/linux-cxl/20250522145622.00002633@huawei.com/ #2
>>> Reported-by: Itaru Kitayama <itaru.kitayama@linux.dev>
>>> Closes: https://github.com/pmem/ndctl/issues/278 #1
>>> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
>>> Tested-by: Itaru Kitayama <itaru.kitayama@fujitsu.com <mailto:itaru.kitayama@fujitsu.com>
>>> Tested-by: Marc Herbert <marc.herbert@linux.intel.com>
>>> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>>
>> Applied to cxl/next
>>
>> Added the config check from Alison
> 
> Can this go into the 6.16 release cycle -rc2 or -rc3?

Given that it doesn't break the actual kernel, it's going in 6.17.

> 
> Itaru.
> 
>>
>>>
>>> ---
>>> I haven't given this a fixes tag because it never worked on arm64.
>>> So it isn't a regression fix, and I'm not sure we want to back port this
>>> which a fixes tag might well trigger.  If people want one shout and I'll
>>> try and figure out what is appropriate.
>>> ---
>>> tools/testing/cxl/test/cxl.c | 7 ++++++-
>>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
>>> index 8a5815ca870d..6a25cca5636f 100644
>>> --- a/tools/testing/cxl/test/cxl.c
>>> +++ b/tools/testing/cxl/test/cxl.c
>>> @@ -2,6 +2,7 @@
>>> // Copyright(c) 2021 Intel Corporation. All rights reserved.
>>>
>>> #include <linux/platform_device.h>
>>> +#include <linux/memory_hotplug.h>
>>> #include <linux/genalloc.h>
>>> #include <linux/module.h>
>>> #include <linux/mutex.h>
>>> @@ -1328,6 +1329,7 @@ static int cxl_mem_init(void)
>>> static __init int cxl_test_init(void)
>>> {
>>>    int rc, i;
>>> +    struct range mappable;
>>>
>>>    cxl_acpi_test();
>>>    cxl_core_test();
>>> @@ -1342,8 +1344,11 @@ static __init int cxl_test_init(void)
>>>        rc = -ENOMEM;
>>>        goto err_gen_pool_create;
>>>    }
>>> +    mappable = mhp_get_pluggable_range(true);
>>>
>>> -    rc = gen_pool_add(cxl_mock_pool, iomem_resource.end + 1 - SZ_64G,
>>> +    rc = gen_pool_add(cxl_mock_pool,
>>> +              min(iomem_resource.end + 1 - SZ_64G,
>>> +                  mappable.end + 1 - SZ_64G),
>>>              SZ_64G, NUMA_NO_NODE);
>>>    if (rc)
>>>        goto err_gen_pool_add;
>>
>